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Integrated Device Technology Electronic Components Datasheet

IDT82P5088 Datasheet

Universal Octal T1/E1/J1 LIU

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Universal Octal T1/E1/J1 LIU
with Integrated Clock Adapter
IDT82P5088
FEATURES
• Eight channel T1/E1/J1 long haul/short haul line interfaces
• Supports HPS (Hitless Protection Switching) for 1+1 protection
without external relays
• Receiver sensitivity exceeds -36 dB@772KHz and -43 dB@1024
KHz
• Programmable T1/E1/J1 switchability allowing one bill of ma-
terial for any line condition
• 3.3 V and 1.8 V power supply with 5 V tolerant inputs
• Meets or exceeds specifications in
- ANSI T1.102, T1.403 and T1.408
- ITU I.431, G.703,G.736, G.775 and G.823
- ETSI 300-166, 300-233 and TBR 12/13
- AT&T Pub 62411
• Per channel software selectable on:
- Wave-shapingtemplatesforshorthaulandlonghaulLBO(LineBuild
Out)
- Line terminating impedance (T1:100 , J1:110 E1:75 120 
- Adjustment of arbitrary pulse shape
- JA (jitter attenuator) position (receive path and transmit path)
- Single rail/dual rail system interfaces
- B8ZS/HDB3/AMI line encoding/decoding
- Active edge of transmit clock (TCLK) and receive clock (RCLK)
- Active level of transmit data (TDATA) and receive data (RDATA)
- Receiver or transmitter power down
- High impedance setting for line drivers
- PRBS (Pseudo Random Bit Sequence) generation and detection
with 215-1 PRBS polynomials for E1
- QRSS(QuasiRandomSequenceSignals) generationanddetection
with 220-1 QRSS polynomials for T1/J1
- 16-bit BPV (Bipolar Pulse Violation)/Excess Zero/PRBS or QRSS
error counter
- Analog loopback, Digital loopback, Remote loopback and Inband
loopback
• Per channel cable attenuation indication
• Adaptive receive sensitivity
• Non-intrusive monitoring per ITU G.772 specification
• Short circuit protection for line drivers
• LOS (Loss Of Signal) & AIS (alarm indication signal) detection
• JTAG interface
• Supports serial control interface, Motorola and Intel Non-Multi-
plexed interfaces
• Package:
Available in 256-pin BGA
Green package options available
DESCRIPTION
The IDT82P5088 is an eight port line intereface that can be configured
per port to any combination of T1, E1 or J1 ports. In receive path, an adaptive
equalizer is integrated to remove the distortion introduced by the cable
attenuation. The IDT82P5088 also performs clock/data recovery, AMI/
B8ZS/HDB3 line decoding and detects and reports the LOS conditions. In
the transmit path, there is an AMI/B8ZS/HDB3 encoder, waveform shaper,
LBOs and jitter attenuator for each channel. The jitter attenuators in both
the transmit path and receive path can be disabled. The IDT82P5088 sup-
ports both single rail and dual rail system interfaces. To facilitate network
maintenance, a PRBS/QRSS generation/detection circuit is integrated in
each channel, and different types of loopbacks can be set on a per channel
basis. Four different kinds of line terminating impedance, 75, 100 110
and 120 are selectable on a per channel basis. The chip also provides
driver short-circuit protection and supports JTAG boundary scanning.
The IDT82P5088 can be used in SDH/SONET, WAN, routers, wireless
base stations, IADs, IMA, IMAPs, gateways, frame relay access devices,
CSU/DSU equipment, etc.
IDT and the IDT logo are trademarks of Integrated Device Technology, Inc.
© 2014 Integrated Device Technology, Inc.
1
July 30, 2014
VERSION 2 DSC-7216/-


Integrated Device Technology Electronic Components Datasheet

IDT82P5088 Datasheet

Universal Octal T1/E1/J1 LIU

No Preview Available !

IDT82P5088
UNIVERSAL OCTAL T1/E1/J1 LIU WITH INTEGRATED CLOCK ADAPTER
FUNCTIONAL BLOCK DIAGRAM
TDO
TDI
TMS
TCK
TRST
GPIO[1:0]
RESET
THZ
A[10:0]
D[7:1]
D[0]/SDO
CS
REFR
RW/WR/SDI
DS/RD/SCLK
MPM
SPIEN
INT
REFB_OUT
REFA_OUT
CLK_SEL[2:0]
OSCO
OSCI
CLK_GEN_1.544
CLK_GEN_2.048
FUNCTIONAL BLOCK DIAGRAM
Figure-1 Block Diagram
2
July 30, 2014


Part Number IDT82P5088
Description Universal Octal T1/E1/J1 LIU
Maker IDT
Total Page 30 Pages
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