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STAC9752A Datasheet

(STAC9752A / STAC9753A) AC97 2.3 CODECS

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STAC9752A pdf
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DATASHEET
AC’97 2.3 CODECS WITH STEREO
MICROPHONE & UNIVERSAL JACK
FEATURES
• High Performance Σ∆ Technology
• AC’97 Rev 2.3 Complaint
• 20-bit Full Duplex Stereo ADC & DACs
• Independent Sample Rates for ADC & DACs
• 5-Wire AC-Link Protocol Compliance
• 20-Bit SPDIF Output
• Universal Jacks
• Full Stereo Microphone Pre-Amp
• Internal Jack Sensing on Headphone & Line_Out
• Internal Microphone Input Sensing
• Digital PC Beep Option
• Extended AC’97 2.3 Paging Registers
• General Purpose I/Os and Crystal Elimination
Circuit
• Headphone Drive Capability (50 mW per channel)
• Switchable Headphone Out (pins 39/41 or 35/36)
• 0dB, 10dB, 20dB and 30dB Microphone Boost
Capability
• +3.3 V (STAC9753A) and +5 V (STAC9752A) Analog
Power Supply Options
• Pin Compatible with STAC9750/52/66
KEY SPECIFICATIONS
• Analog LINE_OUT SNR: 94dB
• Digital DAC SNR: 92dB
• Digital ADC SNR: 85dB
• Full-scale Total Harmonic Distortion: 0.002%
• Crosstalk Between Input Channels: -70dB
• Spurious Tone Rejection: 100dB
• Stereo Microphone Input
RELATED MATERIALS
• Data Sheet
STAC9752A/9753A
• Reference Designs
DESCRIPTION
IDT's STAC9752A/9753A are general purpose 20-bit, full
duplex, audio CODECs conforming to the analog compo-
nent specification of AC'97 (Audio CODEC 97 Component
Specification Rev. 2.3). The STAC9752A/9753A incorpo-
rates IDT's proprietary Σ∆ technology.
The AC’97 CODEC is designed to achieve a DAC SNR in
excess of 94dB. The DACs, ADCs, and mixer are inte-
grated with analog I/Os, which include four analog
line-level stereo inputs, two analog line-level mono inputs,
two stereo outputs, and one mono output channel.
The STAC9752A/9753A includes digital input/output capa-
bility for support of modern PC systems, with an output that
supports the SPDIF format. The STAC9752A/9753A is a
standard 2-channel stereo CODEC. With IDT’s headphone
drive capability, headphones can be driven with without an
external amplifier.
The STAC9752A/9753A may be used as a secondary
CODEC, with the STAC9700/21/56/08/84/50/52 as the pri-
mary, in a multiple CODEC configuration conforming to the
AC'97 Rev. 2.3 specification. This configuration can pro-
vide the true six-channel, AC-3 playback required for DVD
applications.
The STAC9752A/9753A communicates via the five-wire
AC-Link to any digital component of AC'97, providing flexi-
bility in the audio system design.
Packaged in an AC'97 compliant 48-pin TQFP, the
STAC9752A/9753A can be placed on a motherboard,
daughter boards, PCI, AMR, CNR, MDC or ACR cards.
The STAC9752A/9753A provides variable sample rate Dig-
ital-to-Analog (DA) and Analog-to-Digital (AD) conversion,
mixing, and analog processing.
Supported audio sample rates include 48KHz, 44.1KHz,
32KHz, 22.05KHz, 16KHz, 11.025KHz, and 8 KHz; addi-
tional rates are supported in the STAC9752A/9753A soft
audio drivers. All ADCs and DACs operate at 20-bit resolu-
IDT™
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
1
STAC9752A/9753A
V 1.5 1206


Integrated Device Technology Electronic Components Datasheet

STAC9752A Datasheet

(STAC9752A / STAC9753A) AC97 2.3 CODECS

No Preview Available !

STAC9752A pdf
STAC9752A/9753A
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
PC AUDIO
TABLE OF CONTENTS
1. PRODUCT BRIEF ...................................................................................................................... 6
1.1. Features ............................................................................................................................................ 6
1.2. Description ........................................................................................................................................ 6
1.3. STAC9752A/9753A Block Diagram ................................................................................................... 8
1.4. Key Specifications ............................................................................................................................. 9
1.5. Related Materials .............................................................................................................................. 9
1.6. Additional Support ............................................................................................................................. 9
2. CHARACTERISTICS AND SPECIFICATIONS .......................................................................10
2.1. Electrical Specifications ................................................................................................................... 10
2.2. AC Timing Characteristics ............................................................................................................... 16
3. TYPICAL CONNECTION AND POWER DIAGRAMS .............................................................21
3.1. STAC9752A/9753A Typical Connection Diagram for 48-pin LQFP ................................................ 21
3.2. STAC9752A/9753A Typical Connection Diagram for 32-pad QFN ................................................. 22
3.3. Split Independent Power Supply Operation .................................................................................... 23
3.4. Split Independent Power Supply Operation for the 32-pad QFP Package ......................................24
4. CONTROLLER, CODEC, AND AC-LINK ................................................................................25
4.1. AC-Link Physical interface ............................................................................................................... 25
4.2. Controller to Single CODEC ............................................................................................................ 25
4.3. Controller to Multiple CODECs ........................................................................................................ 26
4.4. Clocking for Multiple CODEC Implementations ............................................................................... 27
4.5. STAC9752A/9753A as a Primary CODEC ...................................................................................... 28
4.6. AC-Link Power Management ........................................................................................................... 28
5. AC-LINK DIGITAL INTERFACE ..............................................................................................31
5.1. Overview ......................................................................................................................................... 31
5.2. AC-Link Serial Interface Protocol .................................................................................................... 32
5.3. AC-Link Output Frame (SDATA_OUT) ............................................................................................ 35
5.4. AC-Link Input Frame (SDATA_IN) .................................................................................................. 38
5.5. AC-Link Interoperability Requirements and Recommendations ...................................................... 42
5.6. Slot Assignments for Audio ............................................................................................................. 43
6. STAC9752A/9753A FUNCTIONAL BLOCKS .........................................................................46
6.1. STAC9752A/9753A Mixer Description ............................................................................................ 46
6.2. SPDIF Digital Mux ...........................................................................................................................48
6.3. PC Beep Implementation ................................................................................................................ 48
7. PROGRAMMING REGISTERS ................................................................................................50
7.1. Register Descriptions ...................................................................................................................... 51
7.2. General Purpose Input & Outputs ................................................................................................... 68
7.3. Extended CODEC Registers Page Structure Definition .................................................................. 72
7.4. STAC9752A/9753A Paging Registers ............................................................................................. 72
7.5. Vendor ID1 and ID2 (Index 7Ch and 7Eh) ...................................................................................... 84
8. LOW POWER MODES ............................................................................................................85
9. MULTIPLE CODEC SUPPORT ...............................................................................................87
9.1. Primary/Secondary CODEC Selection ............................................................................................ 87
9.2. Secondary CODEC Register Access Definitions ............................................................................. 88
10. TESTABILITY ........................................................................................................................89
10.1. ATE Test Mode ............................................................................................................................. 89
11. STAC9752A/9753A PIN DESCRIPTION ...............................................................................90
11.1. Pin Description for the 48-pin LQFP Package ............................................................................... 90
11.2. Pinout List 48-pin LQFP Package ................................................................................................ 91
11.3. Pin Description for the 32-pad QFN Package ............................................................................... 92
11.4. Pinout List 32-pad QFN Package ................................................................................................. 93
11.5. STAC9752A/9753A Digital I/O ...................................................................................................... 93
11.6. STAC9752A/9753A Analog I/O ..................................................................................................... 94
IDT™
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
2
STAC9752A/9753A
V 1.5 1206


Part Number STAC9752A
Description (STAC9752A / STAC9753A) AC97 2.3 CODECS
Maker IDT
Total Page 30 Pages
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