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STAC9759 Datasheet

(STAC9758 / STAC9759) HIGH-PERFORMANCE 6-CHANNEL AC97 2.3 CODEC

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DATASHEET
HIGH-PERFORMANCE 6-CHANNEL AC’97
2.3 CODEC WITH UNIVERSAL JACKS™
STAC9758/9759
OVERVIEW
DESCRIPTION
High performance, 6-channel, AC’97 2.3 CODECs with
high Signal-to-Noise ratio and low distortion.
FEATURES
High performance Σ∆ technology
6-Channel AC’97 2.3 CODECs
20-bit full duplex stereo ADCs
20-bit full duplex DACs
Headphone drive capability
SPDIF_IN Support
SPDIF_OUT Support, including 96 kHz
ADAT® Optical “Litepipe” Interface
Support
Universal JacksTM Functionality for jack
interchangeability
Internal Jack Sensing
Crystal Elimination Circuit
Front/Rear Stereo Microphone
96 kHz DAC Playback support
Up to 5 General Purpose I/Os
Digital and Analog PC BEEP
AC’97 2.3 Paging Registers and Analog Plug and
Play Capability
Energy saving dynamic power modes
>90 dB SNR and >-90dBV THD+N
Adjustable VREF_OUT Control
Pin compatible with 2-Channel CODECs
Independent sample rates for ADC & DACs
+3.3 V & +5 V analog power supply options
IDT's STAC9758/9759 are general purpose 20-bit, full
duplex, 6-Channel audio CODECs conforming to the ana-
log component specification of AC '97 (Audio Codec 97
Component Specification Rev. 2.3). The STAC9758/9759
incorporates IDT's proprietary Σ∆ technology to achieve a
DAC SNR in excess of 90dB. With IDT’s headphone drive
capability, headphones can be driven without an external
amplifier. The STAC9758/9759 communicates via the five
AC-Link to any digital component of AC '97, providing flexi-
bility in the audio system design. Packaged in an AC '97
compliant 48-pin TQFP, the STAC9758/9759 can be
placed on the motherboard, daughter boards, PCI, AMR,
CNR, MDC or ACR cards.
Supported ADC and DAC audio sample rates include
96kHz, 48kHz, 44.1kHz, 32kHz, 22.05kHz, 16kHz,
11.025kHz, and 8 kHz; additional rates are supported in
the STAC9758/9759 soft audio drivers. All ADCs and
DACs operate at 20-bit resolution. SPDIF_OUT supported
sample rates include 96kHz, 48kHz, 44.1kHz and
32kHz. SPDIF_IN supports 48kHz and 44.1kHz.
The STAC9758/9759 includes internal jack sensing using
proprietary IDT current and impedance-sensing tech-
niques. The impedance load on any of the inputs or outputs
can be detected. The STAC9758/9759 also supports Uni-
versal JacksTM functionality for jack interchangeability.
The GPIOs on the STAC9758/9759 remain available for
advanced configurations. The STAC9758/9759 can sup-
port up to 5 GPIOs.
The STAC9758/9759 is designed primarily to support
6-channel audio. Additionally, the STAC9758/9759 pro-
vides for a stereo enhancement feature, IDT Surround 3D
(SS3D).
The STAC9758/9759 also supports the ADAT® Optical
“Litepipe” Interface, which provides an 8 channel output for
professional and consumer audio applications.
The STAC9758/9759 can be SoundBlaster® and Windows
Sound System® compatible when used with IDT’s WDM
driver for Windows 98/2K/ME/XP or with Intel/Microsoft
driver included with Windows 2K/ME/XP.
SoundBlaster is a registered trademark of Creative Labs.
Windows is a registered trademark of Microsoft Corporation.
ADAT Optical is a registered trademark of Alesis Corporation.
IDT™
1
HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™
STAC9758/9759
V 1.2 1206


Integrated Device Technology Electronic Components Datasheet

STAC9759 Datasheet

(STAC9758 / STAC9759) HIGH-PERFORMANCE 6-CHANNEL AC97 2.3 CODEC

No Preview Available !

STAC9758/9759
HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™
PC AUDIO
TABLE OF CONTENTS
1. DESCRIPTION ........................................................................................................................... 7
1.1. Features ........................................................................................................................................... 8
1.2. Block Diagram ................................................................................................................................... 9
2. CHARACTERISTICS/SPECIFICATIONS ................................................................................10
2.1. Electrical Specifications ................................................................................................................... 10
2.1.1. Absolute Maximum Ratings ............................................................................................... 10
2.1.2. Recommended Operation Conditions ............................................................................... 10
2.1.3. Power Consumption ......................................................................................................... 11
2.1.4. AC-Link Static Digital Specifications ................................................................................. 12
2.1.5. STAC9758 5V Analog Performance Characteristics ........................................................12
2.1.6. STAC9759 3.3V Analog Performance Characteristics .....................................................14
2.2. AC Timing Characteristics ............................................................................................................... 17
2.2.1. Cold Reset ......................................................................................................................... 17
2.2.2. Warm Reset ....................................................................................................................... 17
2.2.3. Clocks ................................................................................................................................ 18
2.2.4. STAC9758/9759 Crystal Elimination Circuit and Clock Frequencies ................................19
2.2.5. Data Setup and Hold ........................................................................................................ 20
2.2.6. Signal Rise and Fall Times ................................................................................................ 20
2.2.7. AC-Link Low Power Mode Timing ..................................................................................... 21
2.2.8. ATE Test Mode ..................................................................................................................21
3. TYPICAL CONNECTION DIAGRAM .......................................................................................22
3.1. Split Independent Power Supply Operation .................................................................................... 23
4. CONTROLLER, CODEC AND AC-LINK .................................................................................25
4.1. AC-Link Physical interface ............................................................................................................... 25
4.2. Controller to Single CODEC ............................................................................................................ 25
4.3. Controller to Multiple CODECs ........................................................................................................ 27
4.3.1. Primary CODEC Addressing ............................................................................................. 27
4.3.2. Secondary CODEC Addressing ........................................................................................ 27
4.3.3. CODEC ID Strapping ......................................................................................................... 28
4.4. Clocking for Multiple CODEC Implementations ............................................................................... 28
4.5. STAC9758/9759 as a Primary CODEC ........................................................................................... 28
4.5.1. STAC9758/9759 as a Secondary CODEC ........................................................................ 28
4.6. AC-Link Power Management ........................................................................................................... 29
4.6.1. Powering down the AC-Link .............................................................................................. 29
4.6.2. Waking up the AC-Link ...................................................................................................... 29
4.6.3. CODEC Reset ................................................................................................................... 30
5. AC-LINK DIGITAL INTERFACE ..............................................................................................31
5.1. Overview ......................................................................................................................................... 31
5.2. AC-Link Serial Interface Protocol .................................................................................................... 32
5.2.1. AC-Link Variable Sample Rate Operation ......................................................................... 33
5.2.2. Variable Sample Rate Signaling Protocol .......................................................................... 33
5.2.3. Primary and Secondary CODEC Register Addressing ...................................................... 34
5.3. AC-Link Output Frame (SDATA_OUT) ............................................................................................ 35
5.3.1. Slot 0: TAG / CODEC ID ................................................................................................... 36
5.3.2. Slot 1: Command Address Port ......................................................................................... 36
5.3.3. Slot 2: Command Data Port ............................................................................................... 37
5.3.4. Slot 3: PCM Playback Left Channel .................................................................................. 37
5.3.5. Slot 4: PCM Playback Right Channel ................................................................................ 37
5.3.6. Slot 5: Modem Line 1 Output Channel .............................................................................. 37
5.3.7. Slot 6 - 11: DAC ................................................................................................................. 37
5.3.8. Slot 12: Audio GPIO Control Channel ............................................................................... 38
5.4. AC-Link Input Frame (SDATA_IN) ................................................................................................. 38
5.4.1. Slot 0: TAG ........................................................................................................................39
IDT™
2
HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™
STAC9758/9759
V 1.2 1206


Part Number STAC9759
Description (STAC9758 / STAC9759) HIGH-PERFORMANCE 6-CHANNEL AC97 2.3 CODEC
Maker IDT
Total Page 30 Pages
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