Description
A0-A12
Row Address Input
A0-A9
Column Address Input
BA0, BA1
Bank Select Address
DQ0 to DQ7 Data I/O
CLK
System Clock Input
CKE
Clock Enable
CS
Chip Select
RAS
Row Address Strobe Command
CAS
Column Address Strobe Command
WE DQM Vdd Vss Vddq Vssq NC
Wri
Features
- Clock frequency: 133, 100 MHz.
- Fully synchronous; all signals referenced to a positive clock edge.
- Internal bank for hiding row access/precharge.
- Single Power supply: 2.5V + 0.2V.
- LVTTL interface.
- Programmable burst length.
- (1, 2, 4, 8, full page).
- Programmable burst sequence: Sequential/Interleave.
- Auto Refresh (CBR).
- Self Refresh.
- 8K refresh cycles every 16 ms (A2 grade) or 64 ms (com.
IS42R83200D Datasheet
