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IS42VM32200M - 512K x 32Bits x 4Banks Mobile Synchronous DRAM

General Description

These IS42SM/RM/VM32200M are mobile 67,108,864 bits CMOS Synchronous DRAM organized as 4 banks of 524,288 words x 32 bits.

These products are offering fully synchronous operation and are referenced to a positive edge of the clock.

Key Features

  • JEDEC standard 3.3V, 2.5V, 1.8V power supply.
  • Auto refresh and self refresh.
  • All pins are compatible with LVCMOS interface.
  • 4K refresh cycle / 64ms.
  • Programmable Burst Length and Burst Type - 1, 2, 4, 8 or Full Page for Sequential Burst - 4 or 8 for Interleave Burst.
  • Programmable CAS Latency : 2,3 clocks.
  • All inputs and outputs referenced to the positive edge of the system clock.
  • Data mask function by DQM.
  • Internal 4.

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📁 Similar Datasheet

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Other Datasheets by ISSI (now Infineon)

Part Number Description
IS42VM32200K 512K x 32Bits x 4Banks Mobile Synchronous DRAM
IS42VM32100C 512K x 32Bits x 2Banks Low Power Synchronous DRAM
IS42VM32100D 512K x 32Bits x 2Banks Low Power Synchronous DRAM
IS42VM32160D 4M x 32Bits x 4Banks Mobile Synchronous DRAM
IS42VM32160E 4M x 32Bits x 4Banks Mobile Synchronous DRAM

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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IS42/45SM/RM/VM32200M 512K x 32Bits x 4Banks Mobile Synchronous DRAM Description These IS42SM/RM/VM32200M are mobile 67,108,864 bits CMOS Synchronous DRAM organized as 4 banks of 524,288 words x 32 bits. These products are offering fully synchronous operation and are referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve high bandwidth. All input and output voltage levels are compatible with LVCMOS. Features  JEDEC standard 3.3V, 2.5V, 1.