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Integrated Silicon Solution Electronic Components Datasheet

IS43LQ32128AL Datasheet

4Gb Mobile LPDDR4/LPDDR4X

No Preview Available !

IS43/46LQ16256A, IS43/46LQ16256AL
IS43/46LQ32128A, IS43/46LQ32128AL
® Long-term Support
World Class Quality
4Gb (x16/x32) Mobile LPDDR4/LPDDR4X
FEATURES
• Configuration:
- 256Mb x16 x 1 channel
- 128Mb x 16 x 2 channels
- 8 internal banks per channel
• Low-voltage Core and I/O Power Supplies
VDD1 = 1.70-1.95V
VDD2 = 1.06-1.17V
VDDQ = 1.06-1.17V (LPDDR4)
VDDQ = 0.57-0.65V (LPDDR4X)
• LVSTL(Low Voltage Swing Terminated Logic) I/O
Interface
• Internal VREF and VREF Training
• Dynamic ODT :
DQ ODT :VSSQ Termination
CA ODT :VSS Termination
• Max. Clock Frequency : 1.6GHz (3.2Gbps)
• 16n Pre-fetch DDR architecture
• Single data rate (multiple cycles) command/
address bus
• Bidirectional/differential data strobe per byte of
data (DQS/DQS#)
• Programmable burst lengths (16 or 32)
• ZQ Calibration
• Operation Temperature
Industrial (TC = -40°C to 95°C)
Automotive, A1 (TC = -40°C to 95°C)
Automotive, A2 (TC = -40°C to 105°C)
Automotive, A3 (TC = -40°C to 125°C)
• Clock-Stop capability
APRIL 2020
DESCRIPTION
The IS43/46LQ16256A/AL and IS43/46LQ32128A/AL
are 4Gbit CMOS LPDDR4 SDRAM. The device is
organized as 1/2 channels per device, and individual
channel is 8-banks and 16-bits. This product uses a
double-data-rate architecture to achieve high-speed
operation.
The double data rate architecture is essentially a 16N
prefetch architecture with an interface designed to
transfer two data words per clock cycle at the I/O pins.
This product offers fully synchronous operations
referenced to both rising and falling edges of the clock.
The data paths are internally pipelined and 16n bits
prefetched to achieve very high bandwidth.
• On-chip temperature sensor whose status
can be read from MR4
200-ball x16/x32 BGA (10x14.5mm)
ADDRESS TABLE *
Parameter
# of Channel
1
2
Row Addresses
R0-R14 R0-R13
Column Addresses
C0-C9
Bank Addresses
BA0-BA2
Note: Address information is per channel base.
KEY TIMING PARAMETERS
Speed Freq.
Grade (MHz)
-062
-075
1600
1333
Data
Rate
(Mb/s)
3200
2666
Write
Latency
Set Set
A
B
14 26
12 22
Read
Latency
DBI DBI
OFF ON
28 32
24 28
Note: Other clock frequencies/data rates supported; please
refer to AC timing tables.
Copyright © 2020 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no
liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on
any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be ex-
pected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon
Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com
1
Rev. A
03/24/2020


Integrated Silicon Solution Electronic Components Datasheet

IS43LQ32128AL Datasheet

4Gb Mobile LPDDR4/LPDDR4X

No Preview Available !

IS43/46LQ16256A, IS43/46LQ16256AL
IS43/46LQ32128A, IS43/46LQ32128AL
® Long-term Support
World Class Quality
1. BALL ASSIGNMENTS AND DESCRIPTIONS (for x16)
200-ball x16 Discrete Package, 0.80mm x 0.65mm using MO-311
1
2
3
4
5
6
7
8
9
10
11
12
A DNU
DNU
VSS VDD2 ZQ0 0.80mm Pitch NC
VDD2
VSS
DNU
DNU
B DNU DQ0_A VDDQ DQ7_A VDDQ
VDDQ DQ15_A VDDQ DQ8_A DNU
C VSS
DQ1_A DMI0_A DQ6_A
VSS
VSS DQ14_A DMI1_A DQ9_A
VSS
D VDDQ
VSS DQS0_T_A VSS
VDDQ
E
VSS
DQ2_A
DQS0_C_
A
DQ5_A
VSS
F VDD1 DQ3_A VDDQ DQ4_A VDD2
G
VSS
ODT_CA_
A
VSS
VDD1
VSS
H VDD2 CA0_A
NC
CS0_A VDD2
VDDQ
VSS DQS1_T_A VSS
VDDQ
VSS
DQ13_A
DQS1_C_
A
DQ10_A
VSS
VDD2 DQ12_A VDDQ DQ11_A VDD1
VSS
VDD1
VSS
NC
VSS
VDD2 CA2_A CA3_A CA4_A VDD2
J
VSS
CA1_A
VSS CKE0_A
NC
K VDD2
VSS
VDD2
VSS
NC
L
M
N VDD2
VSS
VDD2
VSS
NC
P VSS
NC
VSS
NC
NC
R VDD2
NC
NC
NC
VDD2
CK_t_A CK_c_A VSS
CA5_A
VSS
NC
VSS
VDD2
VSS
VDD2
NC
NC
VDD2
VSS
NC
NC
VDD2
VSS
NC
VSS
NC
NC
VDD2
VSS
VDD2
T VSS
NC
VSS
VDD1
VSS
VSS
VDD1
VSS RESET_N VSS
U VDD1
NC
VDDQ
NC
VDD2
VDD2
NC
VDDQ
NC
VDD1
V VSS
NC
NC
NC
VSS
VSS
NC
NC
NC
VSS
W VDDQ
Y VSS
AA DNU
VSS
NC
NC
NC
NC
VDDQ
VSS
NC
NC
VDDQ
VSS
VDDQ
VDDQ
VSS
VDDQ
VSS
NC
NC
NC
NC
VDDQ
VSS
NC
NC
VDDQ
VSS
DNU
AB DNU
DNU
VSS
VDD2
VSS
VSS
VDD2
VSS
DNU
DNU
NOTE 1 0.8mm pitch (X-axis), 0.65mm pitch (Y-axis), 22 rows.
NOTE 2 Top View, A1 in top left corner.
NOTE 3 Die pad VSS and VSSQ signals are combined to VSS package balls.
Integrated Silicon Solution, Inc. — www.issi.com
2
Rev. A
03/24/2020



Part Number IS43LQ32128AL
Description 4Gb Mobile LPDDR4/LPDDR4X
Maker ISSI
Total Page 3 Pages
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