Datasheet4U Logo Datasheet4U.com

IS46LR32200C - 512K x 32Bits x 4Banks Mobile DDR SDRAM

General Description

The IS43/46LR32200C is 67,108,864 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 524,288 words x 32 bits.

This product uses a double-data-rate architecture to achieve high-speed operation.

The Data Input/ Output signals are transmitted on a 32-bit bus.

Overview

IS43/46LR32200C 512K x 32Bits x 4Banks Mobile DDR SDRAM.

Key Features

  • JEDEC standard 1.8V power supply.
  • VDD = 1.8V, VDDQ = 1.8V.
  • Four internal banks for concurrent operation.
  • MRS cycle with address key programs - CAS latency 2, 3 (clock) - Burst length (2, 4, 8, 16) - Burst type (sequential & interleave).
  • Fully differential clock inputs (CK, /CK).
  • All inputs except data & DM are sampled at the rising edge of the system clock.
  • Data I/O transaction on both edges of data strobe.
  • Bidirectional d.