IS61QDPB44M18 Datasheet - ISSI

QUADP (Burst of 4) Synchronous SRAMs

IS61QDPB44M18 Features

* 2M x 36 or 4M x 18.

* On-chip delay-locked loop (DLL) for wide data valid window.

* Separate read and write ports with concurrent read and write operations.

* Synchronous pipeline read with late write operation.

* Double data rate (DDR) interface for read an

IS61QDPB44M18 General Description

The 72Mb IS61QDPB42M36 and IS61QDPB44M18 are synchronous, high-performance CMOS static random access memory (SRAM) devices. These SRAMs have separate I/Os, eliminating the need for high-speed bus turnaround. The rising edge of K clock initiates the read/write operation, and all internal operations a.

IS61QDPB44M18 Datasheet (630.70 KB)

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Datasheet Details

Part number:

IS61QDPB44M18

Manufacturer:

ISSI

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630.70 KB

Description:

Quadp (burst of 4) synchronous srams.

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IS61QDPB44M18 QUADP Burst Synchronous SRAMs ISSI

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IS61QDPB44M18 Features

IS61QDPB44M18 General Description

Datasheet Details

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