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IS61lPS102418A - 18Mb Single CYCLE DESELECT STATIC RAM

This page provides the datasheet information for the IS61lPS102418A, a member of the IS61LPS102418A 18Mb Single CYCLE DESELECT STATIC RAM family.

Description

and IS61LPS/VPS25672A are high-speed, low-power synchronous static RAMs designed to provide burstable, high-performance memory for communication and networking applications.

Features

  • Internal self-timed write cycle.
  • Individual Byte Write Control and Global Write.
  • Clock controlled, registered address, data and control.
  • Burst sequence control using MODE input.
  • Three chip enable option for simple depth ex- pansion and address pipelining.
  • Common data inputs and data outputs.
  • Auto Power-down during deselect.
  • Single cycle deselect.
  • Snooze MODE for reduced-power standby.
  • JTAG Boundary Scan.

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Datasheet preview – IS61lPS102418A

Datasheet Details

Part number IS61lPS102418A
Manufacturer ISSI
File Size 614.98 KB
Description 18Mb Single CYCLE DESELECT STATIC RAM
Datasheet download datasheet IS61lPS102418A Datasheet
Additional preview pages of the IS61lPS102418A datasheet.

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Full PDF Text Transcription

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IS61vPS25672A IS61lPS25672A IS61vPS51236A IS61lPS51236A IS61vPS102418A IS61lPS102418A 256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, Single CYCLE DESELECT STATIC RAM JULY 2017 FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth ex- pansion and address pipelining • Common data inputs and data outputs • Auto Power-down during deselect • Single cycle deselect • Snooze MODE for reduced-power standby • JTAG Boundary Scan for PBGA package • Power Supply LPS: Vdd 3.3V + 5%, Vddq 3.3V/2.5V + 5% VPS: Vdd 2.5V + 5%, Vddq 2.
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