IS67WVQ4M4EDBLL Overview
The IS66/67WVQ4M4EDALL/BLL are integrated memory device containing 16Mb Pseudo Static Random Access Memory, using a self-refresh DRAM array organized as 2M words by 8 bits. The device supports Quad DDR interface, which is patible with JEDEC standard x4 xSPI Flash. The device supports Very Low Signal Count (7 signal pins;.
IS67WVQ4M4EDBLL Key Features
- Industry Standard Serial Interface
- Quad DDR (x4 xSPI) Interface: mand (1 byte) =SDR Address (2-byte) & Data = DDR
- Low Signal Counts :7 Signal pins (CS#, SCLK, DQSM, SIO0~SIO3)
- High Performance
- On chip ECC (chunk size = 4 bit): 1-bit correction and 2-bit detection
- Double Data Rate (DDR) Operation: 200MHz (200MB/s) at 1.8V VCC (1) 133MHz (133MB/s) at 3.0V VCC
- Source Synchronous Output signal during Read Operation (DQSM)
- Data Mask during Write Operation (DQSM)
- Configurable Latency for Read/Write Operation
- Supports Variable Latency mode and Fixed Latency mode