32N50Q Overview
+150 300 2500 6 V V V V A A A J mJ V/ns W °C °C °C °C V~ g ISOPLUS 247TM E 153432 G D Isolated back surface G = Gate S = Source Patent pending D = Drain.
32N50Q Key Features
- Silicon chip on Direct-Copper-Bond substrate
- High power dissipation
- Isolated mounting surface
- 2500V electrical isolation
- Low drain to tab capacitance(<50pF)
- Low RDS (on) HDMOSTM process
- Rugged polysilicon gate cell structure
- Unclamped Inductive Switching (UIS) rated
- Fast intrinsic Rectifier
