2EDN752x / 2EDN852x
The control and enable inputs are LV-TTL compatible (CMOS 3.3 V) with an input voltage range from -5 V to +20 V.
-10 V input pin robustness protects the driver against latch-up or electrical overstress which can be induced by
parasitic ground inductances. This greatly enhances system stability.
4.2 V and 8 V UVLO (Under Voltage Lock Out) options ensure instant MOSFET and GaN protection under abnormal
conditions. Under such circumstances, this UVLO mechanism provides crucial independence from whether and
when other supervisors circuitries detect abnormal conditions.
Each of the two outputs is able to sink and source 5 A currents utilizing a true rail-to-rail stage. This ensures very
low on resistance of 0.7 Ω up to the positive and 0.55 Ω down to the negative rail respectively. Very tight channel
to channel delay matching, typ. 1 ns, permits parallel use of two channels, leading to a source and sink capability
of 10 A. Industry leading reverse current robustness eliminates the need for Schottky diodes at the outputs and
reduces the bill-of-material.
The pinout of the 2EDN family is compatible with the industry standard. Two different control input options,
direct and inverted, offer high flexibility. Three package variants, DSO 8-pin, TSSOP 8-pin, WSON 8-pin, allow
optimization of PCB board space usage and thermal characteristics.