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S25HL04GT - 4-Gb (QDP) SEMPER Flash

Download the S25HL04GT datasheet PDF. This datasheet also covers the S25HS02GT variant, as both devices belong to the same 4-gb (qdp) semper flash family and are provided as variant models within a single manufacturer datasheet.

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Note: The manufacturer provides a single datasheet file (S25HS02GT-Infineon.pdf) that lists specifications for multiple related part numbers.

Overview

S25HS02GT, S25HS04GT, S25HL02GT, S25HL04GT 2-Gb (DDP)/4-Gb (QDP), SEMPER™ Flash with Quad SPI 1.8 V, 3.0 V Device overview • Architecture - Infineon 45-nm MIRRORBIT™ technology that stores two data bits in each memory array cell - Multi-chip package (MCP) • 02GT Dual Die Package (DDP) 2 × 1 Gb die • 04GT Quad Die Package (QDP) 4 × 1 Gb die - Sector Architecture options • Uniform - Address space consists of all 256 KB Sectors • Hybrid Configuration 1: Address space consists of thirty-two 4 KB sectors grouped either on the top or the bottom while the remaining sectors are all 256 KB Configuration 2: Address space consists of thirty-two 4 KB sectors at the top and bottom while the remaining sectors are all 256 KB - Page Programming buffer of 256 or 512 bytes - OTP Secure Silicon array of 1024 bytes (32 × 32 bytes) • Interface - Quad SPI • Supports 1S-1S-4S, 1S-4S-4S, 1S-4D-4D, 4S-4S-4S, 4S-4D-4D protocols • SDR option runs up to 83 MBps (166 MHz clock speed) • DDR option runs up to 102 MBps (102 MHz clock speed) - Dual SPI • Supports 1S-2S-2S protocol • SDR option runs up to 41.

Key Features

  • Functional Safety with the Industry’s first ISO26262 ASIL B compliant and ASIL D ready NOR flash.
  • EnduraFlex™ Architecture provides High-Endurance and Long Retention Partitions.
  • Data Integrity CRC detects errors in memory array.
  • SafeBoot reports device initialization failures, detects configuration corruption and provides recovery options.
  • Built-in Error Correcting Code (ECC) corrects Single-bit Error and detects Double-bit Error (SECDED) on memory a.