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M2082 - VCSO FEC PLL WITH AUTOSWITCH FOR SONET/OTN

This page provides the datasheet information for the M2082, a member of the M20 VCSO FEC PLL WITH AUTOSWITCH FOR SONET/OTN family.

Description

The M2080/81/82 and M2085/86/87 are VCSO (Voltage Controlled SAW Oscillator) based clock PLLs designed for FEC clock ratio translation in 10Gb optical systems such as OC-192 or 10GbE.

Features

  • Integrated SAW delay line; Output of 15 to 700 MHz.
  • Low phase jitter < 0.5 ps rms typical (12kHz to 20MHz or 50kHz to 80MHz).
  • LVPECL clock output (CML and LVDS options available).
  • Pin-selectable PLL divider ratios support FEC ratios.
  • M2080/85: OTU1 (255/238) and OTU2 (255/237) Mapping.
  • M2081/86: OTU1 (238/255) or OTU2 (237/255) De-mapping.
  • M2082/87: OTU1 (238/255) and OTU2 (237/255) De-mapping 28 29 30 31 32 33 34 35 36 M2080 Series (Top Vi.

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Datasheet preview – M2082

Datasheet Details

Part number M2082
Manufacturer Integrated Circuit Solution Inc
File Size 501.80 KB
Description VCSO FEC PLL WITH AUTOSWITCH FOR SONET/OTN
Datasheet download datasheet M2082 Datasheet
Additional preview pages of the M2082 datasheet.

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Other Datasheets by Integrated Circuit Solution Inc
  • M2080 - VCSO FEC PLL WITH AUTOSWITCH FOR SONET/OTN
  • M2080-2087 - VCSO FEC PLL WITH AUTOSWITCH FOR SONET/OTN
  • M2081 - VCSO FEC PLL WITH AUTOSWITCH FOR SONET/OTN
  • M2085 - VCSO FEC PLL WITH AUTOSWITCH FOR SONET/OTN
  • M2086 - VCSO FEC PLL WITH AUTOSWITCH FOR SONET/OTN
  • M2087 - VCSO FEC PLL WITH AUTOSWITCH FOR SONET/OTN
  • M2006-02 - VCSO BASED FEC CLOCK PLL / HITLESS SWITCHING OPTION
  • M2006-12 - VCSO BASED FEC CLOCK PLL / HITLESS SWITCHING OPTION

Full PDF Text Transcription

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Integrated Circuit Systems, Inc. Preliminary Information VCSO FEC PLL WITH AUTOSWITCH FOR SONET/OTN PIN ASSIGNMENT (9 x 9 mm SMT) FIN_SEL1 GND P_SEL2 DIF_REF0 nDIF_REF0 REF_SEL DIF_REF1 nDIF_REF1 VCC FIN_SEL0 FEC_SEL0 FEC_SEL1 LOL NBW VCC DNC DNC DNC 27 26 25 24 23 22 21 20 19 M2080/81/82 M2085/86/87 GENERAL DESCRIPTION The M2080/81/82 and M2085/86/87 are VCSO (Voltage Controlled SAW Oscillator) based clock PLLs designed for FEC clock ratio translation in 10Gb optical systems such as OC-192 or 10GbE. They support FEC (Forward Error Correction) clock multiplication ratios, both forward (mapping) and inverse (de-mapping). Multiplication ratios are pin-selected from pre-programming look-up tables. FEATURES ◆ Integrated SAW delay line; Output of 15 to 700 MHz * ◆ Low phase jitter < 0.
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