| Description | 14.318 MHz reference clock output L a t c h e d f r e q u e n cy s e l e c t i n p u t . H a s p u l l - u p t o V D D P C I 14.318MHz reference clock output Halts PCICLK [5:0] at logic "0" level when low. (in mobile, MODE=0) Ground. 14.318MHz input. Has internal load cap, (nominal 33pF). Crystal output. Has internal load cap (33pF) and feedback resistor to X1 Free running BUS clock not affected b... |
| Features |
• 3 - CPUs @2.5V, up to 150MHz. • 17 - SDRAM @ 3.3V, up to 150MHz. • 7 - PCI @3.3V • 2 - IOAPIC @ 2.5V • 1 - 48MHz, @3.3V fixed. • 1 - 24MHz @ 3.3V • 2 - REF @3.3V, 14.318MHz. Features: • Up to 150MHz frequency support • Support power management: CPU, PCI, stop and Power down Mode form I2C programming. • Spread spectrum for EMI control (0 to -0.5%... |
| Datasheet |
 9250-08 Datasheet - 395.15KB |
