* Low skew, low jitter PLL clock driver
* 1 to 10 differential clock distribution (SSTL_2)
* Feedback pins for input to output synchronization
* PD# for .

Features:
* Low skew, low jitter PLL clock driver
* 1 to 10 differential clock distribution (SSTL_2)
* Feedback pins for input to output synchronization
* PD# for power management
* Spread Spectrum-tolerant inputs
* Auto PD wh.

95001-2441

95001-2641

95001-2661

95001-2881

95001-2882

95001-9841

952-13-68-2GC19-90

952-13-68-2GC19-90TR

952-13-68-xGCxx-90xx

9520N

9536XL

954204

954206B