* 2 differential 2.5V/3.3V LVPECL / ECL bank outputs
* 2 differential clock input pairs
* CLKx, nCLKx pairs can accept the following differential input levels.

demanding well defined performance and repeatability. ICS BLOCK DIAGRAM CLKA nCLKA QA0 nQA0 QA1 nQA1 CLK_ENA D Q LE QA.

The ICS85310I-31 is a low skew, high performance dual 1-to-5 Differential-to-2.5V/3.3V ECL/LVPECL HiPerClockS™ Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The CLKx, nCLKx pairs can accept most s.

ICS5310I-01

ICS5314I-01

ICS5314I-11

ICS5342

ICS501

ICS501A

ICS501B

ICS502

ICS503

ICS507-xx

ICS508

ICS511

ICS512