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ICS570B - Multiplier and Zero Delay Buffer

Datasheet Summary

Description

The ICS570B is a high performance Zero Delay Buffer (ZDB) which integrates ICS’ proprietary analog/digital Phase Locked Loop (PLL) techniques.

The ICS570B, part of ICS’ ClockBlocks™ family, was designed as a performance upgrade to meet today’s higher speed and lower voltage requirements.

Features

  • Packaged in 8 pin SOIC.
  • Pin-for-pin replacement and upgrade to ICS570/ICS570A.
  • Functional equivalent to AV9170 (not a pinfor-pin replacement).
  • Low input to output skew of 300 ps max (>60 MHz outputs).
  • Low skew (100 ps) outputs.
  • Ability to choose between 14 different multipliers from 0.5X to 32X.
  • Input clock frequency up to 150 MHz at 3.3V.
  • Can recover degraded input clock duty cycle.
  • Output clock duty cycle.

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Datasheet preview – ICS570B

Datasheet Details

Part number ICS570B
Manufacturer Integrated Circuit Systems
File Size 110.06 KB
Description Multiplier and Zero Delay Buffer
Datasheet download datasheet ICS570B Datasheet
Additional preview pages of the ICS570B datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com PRELIMINARY INFORMATION ICS570B Multiplier and Zero Delay Buffer Features • Packaged in 8 pin SOIC. • Pin-for-pin replacement and upgrade to ICS570/ICS570A • Functional equivalent to AV9170 (not a pinfor-pin replacement). • Low input to output skew of 300 ps max (>60 MHz outputs). • Low skew (100 ps) outputs. • Ability to choose between 14 different multipliers from 0.5X to 32X. • Input clock frequency up to 150 MHz at 3.3V. • Can recover degraded input clock duty cycle. • Output clock duty cycle of 45/55. • Power Down and Tri-State Mode. • Full CMOS clock swings with 25mA drive capability at TTL levels. • Advanced, low power CMOS process. • Operating voltage of 3.3 V (±5%).
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