* Two LVCMOS / LVTTL outputs
* Two differential CLKx, nCLKx input pairs
* CLK, nCLK pairs can accept the following differential input levels: LVDS, LVPECL, LV.

with limited board space. www.DataSheet4U.com IC S BLOCK DIAGRAM CLK0 nCLK0 CLK1 nCLK1 Q0 PIN ASSIGNMENT CLK0 nCLK0 n.

The ICS83023I is a dual, 1-to-1 Differential-toLVCMOS Translator/Fanout Buffer and a memHiPerClockS™ ber of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The differential inputs can accept most differential signal types (LVDS,.

ICS83023

ICS8302

ICS8302-01

ICS83021I

ICS83026I

ICS83026I-01

ICS8302I-01

ICS83032I

ICS8304

ICS8304-01

ICS8304I

ICS8305

ICS83052I

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