1-to-2 differential-to-lvcmos/lvttl fanout buffer.
* 2 LVCMOS / LVTTL outputs
* Differential CLK, nCLK input pair
* CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL.
with limwww.DataSheet4U.com ited board space.
ICS
BLOCK DIAGRAM
Q0 CLK nCLK Q1
PIN ASSIGNMENT
nc CLK nCLK nc 1 2 3 4 .
The ICS83026I is a low skew, 1-to-2 Differential-to-LVCMOS/LVTTL Fanout Buffer and a HiPerClockS™ member of the HiPerClockS™ family of High Perfor mance Clock Solutions from ICS.The differential input can accept most differential signal types (LVDS, .
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