ICS91305I datasheet, buffer equivalent, Integrated Circuit Systems

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ICS91305I Features and benefits

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* Zero input - output delay Frequency range 10 - 133 MHz (3.3V) 5V tolerant input REF High loop filter bandwidth.

ICS91305I Application

Less than 200 ps Jitter between outputs Skew controlled outputs Skew less than 250 ps between outputs Available in 8 pi.

ICS91305I Description

The ICS91305I is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in communic.

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