* Low skew, low jitter PLL clock driver
* Max frequency supported = 266MHz (DDR 533)
* I2C for functional and output control
* Feedback pins for input to output synchronization
* Spread Spectrum tolerant inputs
* 3.3V tolerant CLK_INT input Switching
ICS93732 Datasheet (475.15 KB)
ICS93732
Integrated Circuit Systems
475.15 KB
Low cost ddr phase lock loop zero delay buffer.
Integrated Circuit Systems, Inc. ICS9373 2 Low Cost DDR Phase Lock Loop Zero Delay Buffer Recommended Application: DDR Zero Delay Clock Buffer Prod.
📁 Related Datasheet
ICS93732 Low Cost DDR Phase Lock Loop Zero Delay Buffer (Renesas)
ICS93701 DDR Phase Lock Loop Clock Driver (Integrated Circuit Systems)
ICS93705 DDR Phase Lock Loop Zero Delay Clock Buffer (Integrated Circuit Systems)
ICS93705 DDR Phase Lock Loop Zero Delay Clock Buffer (Renesas)
ICS93716YF-T Low Cost DDR Phase Lock Loop Clock Driver (Integrated Circuit Systems)
ICS93716YG-T Low Cost DDR Phase Lock Loop Clock Driver (Integrated Circuit Systems)
ICS932S200 Frequency Timing Generator (Integrated Circuit Systems)
ICS932S202 Frequency Timing Generator (Integrated Circuit Systems)
ICS932S203 Frequency Generator (IDT)
ICS932S203 Frequency Generator (Integrated Circuit Systems)
