ICS95V860 - 2.5V DDR/Zero Delay Fan Out Buffer

Integrated Circuit Systems

Features

Low skew, low jitter PLL clock driver.
1 to 13 differential clock distribution (SSTL_2).
Feedback pins for input to output synchronization.
PD# for power management.
Spread Spectrum-tolerant inputs.
Auto PD when input signal removed.
0°C to 85°C operation Switching Characteristics:.
CYCLE - CYCLE jitter (>100MHz):.

ICS95V860 2.5v ddr/zero delay fan out buffer by Integrated Circuit Systems - Datasheet Preview

Datasheet Details

Part number	ICS95V860
Manufacturer	Integrated Circuit Systems
File Size	107.59 KB
Description	2.5V DDR/Zero Delay Fan Out Buffer
Datasheet	ICS95V860 Datasheet

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Full PDF Text Transcription

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Integrated Circuit Systems, Inc. ICS95V860 2.5V DDR/Zero Delay Fan Out Buffer (100MHz - 225MHz) Recommended Application: DDR Memory Modules / Zero Delay Fan Out Buffer Product Description/Features: • Low skew, low jitter PLL clock driver • 1 to 13 differential clock distribution (SSTL_2) • Feedback pins for input to output synchronization • PD# for power management • Spread Spectrum-tolerant inputs • Auto PD when input signal removed • 0°C to 85°C operation Switching Characteristics: • CYCLE - CYCLE jitter (>100MHz):<75ps • OUTPUT - OUTPUT skew: <70ps • DUTY CYCLE: 49% - 51% Functionality INPUTS AVDD PD# GND GND 2.5V (nom) 2.5V (nom) 2.5V (nom) 2.

Published: Mar 12, 2014 |