MK3805
Description
The MK3805 is a non-inverting clock driver/buffer providing two independent banks of four outputs each. These buffers have a tri-state output enable input (active low) with 1-input, 5-output configuration per group. The skew between the outputs of the same package is 0.5 ns and the skew between the outputs of different packages is 0.8 ns. The maximum input to output delay is 4.5 ns.
Features
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Packaged in 20 pin SSOP or 20 pin SOIC Five outputs for each bank with one clock input Two separate banks of five outputs each Advanced, low power, CMOS process Ten output clocks Two separate inputs Industrial temperature range -40°C to +85°C Hysteresis on all inputs
Block Diagram
VDD 2 OEA INA OA0-4
OEB INB 5 OB0-4
MON 3 GND
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MDS 3805 A
Revision 072203
Integrated Circuit Systems, Inc.
- 525 Race Street, San Jose, CA 95126
- tel (408) 295-9800
- .icst.
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Preliminary Information
MK3805 Buffer/Clock Driver
Pin Assignment
VCC OA0 OA1 OA2 GND OA3 OA4...
