IDT821024 Datasheet | Integrated Device

Features - - - IDT821024 DESCRIPTION The IDT821024 is a single-chip, four channel PCM CODEC with onchip filters. The device provides analog-to-digital and digital-to-analog conversions and supports both a-law and µ- law panding. The digital filters in IDT821024 provides the necessary transmit and receive filtering for voice telephone circuit to interface with time-division multiplexed systems. All of the digital filters are performed in digital signal processors operating from an internal clock, which is derived from MCLK. The fixed filters set the transmit and receive gain and frequency response. In the IDT821024 the PCM data is transmitted to and received from the PCM highway in time slots determined by the individual Frame Sync signals (FSRn and FSXn, where n = 1-4) at rates from 256 KHz to 8.192 MHz. Both Long and Short Frame Sync modes are available in the IDT821024. The IDT821024 can be used in digital telemunication applications such as PBX, Central Office Switch, Digital Telephone and Integrated Voice/ Data Access Unit. - - - - - - - 4 channel CODEC with on-chip digital filters Selectable A-law or µ-law panding Master clock frequency selection: 2.048 MHz, 4.096 MHz or 8.192 MHz - Internal timing automatically adjusted based on MCLK and frame sync signal Separate PCM and master clocks Single PCM port with up to 8.192 MHz data rate (128 time slots) Transhybrid balance impedance hardware adjustable via external ponents Transmit gains hardware adjustable via external ponents Low power +5.0 V CMOS technology +5.0 V single power supply Package available: 32 pin PLCC, 44 pin TQFP FUNCTIONAL BLOCK DIAGRAM IIN1 VOUT1 IIN2 VOUT2 IIN3 VOUT3 Anolog Front End CH1 PCM TSA 1 PCM TSA 2 PCM TSA 3 PCM TSA 4 FSX1 FSR1 FSX2 FSR2 FSX3 FSR3 FSX4 FSR4 DX TSC DR PCLK Anolog Front End CH2 Anolog Front End CH3 IIN4 VOUT4 Anolog Front End CH4 PCM Interface MCLK IREF CNF Clock & Reference Circuits PDN 1~ 4 Control A/µ AGND The IDT logo is a registered trademark...