9LPRS525 - ICS9LPRS525

Description

3.3V PCI clock output or Clock Request control A for either SRC0 or SRC2 pair The power-up default is PCI0 output, but this pin may also be used as a Clock Request control of SRC pair 0 or SRC pair 2 via SMBus.

Features

2 - CPU differential low power push-pull pairs.
7 - SRC differential push-pull pairs.
1 - CPU/SRC selectable differential low power push-pull pair.
1 - SRC/DOT selectable differential low power push-pull pair.
1 - SRC/SE selectable differential push-pull pair/Single-ended outputs.
5 - PCI, 33MHz.
1 - USB, 48MHz.
1 - REF, 14.318MHz Key Specifications:.
CPU outputs cycle-cycle jitter < 85ps.
SRC output cycl.

Integrated Device Technology

📥 Download Datasheet

Datasheet Details

Part number	9LPRS525
Manufacturer	Integrated Device Technology
File Size	203.77 KB
Description	ICS9LPRS525
Datasheet	9LPRS525 Datasheet
Additional preview pages of the 9LPRS525 datasheet.

📁 Similar Datasheet

9LPRS501 - ICS9LPRS501 (IDT)
9LPRS502 - 56-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR + INTEGRATED SERIES RESISTOR (IDT)
9LPRS365 - ICS9LPRS365 (ICS)
9LP525-2 - 56-pin CK505 Clock (Renesas)
9LP525BG - 56-pin CK505 Clock (IDT)

Other Datasheets by Integrated Device Technology

Full PDF Text Transcription

Click to expand full text

DATASHEET 56-pin CK505 for Intel Systems Recommended Application: 56-pin CK505 compatible clock, w/fully integrated Vreg and series resistors on differential outputs Output Features: • 2 - CPU differential low power push-pull pairs • 7 - SRC differential push-pull pairs • 1 - CPU/SRC selectable differential low power push-pull pair • 1 - SRC/DOT selectable differential low power push-pull pair • 1 - SRC/SE selectable differential push-pull pair/Single-ended outputs • 5 - PCI, 33MHz • 1 - USB, 48MHz • 1 - REF, 14.

Published: Jul 5, 2014 |