ICS8714008I
Description
The ICS8714008I is Zero-Delay Buffer/Frequency Multiplier with eight differential HCSL output pairs, and uses external feedback (differential feedback input and output pairs) for “zero delay” clock regeneration. In PCI Express and Ethernet applications, 100MHz and 125MHz are the most monly used reference clock frequencies and each of the eight output pairs can be independently set for either 100MHz or 125MHz. With an output frequency range of 98MHz to 165MHz, the device is also suitable for use in a variety of other applications such as Fibre Channel (106.25MHz) and XAUI (156.25MHz). The M-LVDS Input/Output pair is useful in backplane applications when the reference clock can either be local (on the same board as the ICS8714008I) or remote via a backplane connector. In output mode, an input from a local reference clock applied to the CLK, n CLK input pins is translated to M-LVDS and driven out to the MLVDS, n MLVDS pins. In input mode, the internal M-LVDS driver is placed in...
