ICS873991-147 Datasheet PDF (LOW VOLTAGE LVCMOS/LVPECL-TO LVPECL/ECL CLOCK GENERATOR) | Download Integrated Device Technology ICS873991-147

ICS873991-147 - LOW VOLTAGE LVCMOS/LVPECL-TO LVPECL/ECL CLOCK GENERATOR

Description

The ICS873991-147 is a low voltage, low skew, 3.3V IC S LVPECL or ECL Clock Generator and a member of HiPerClockS™ the HiPerClockS™ family of High Performance Clock Solutions from IDT.

The ICS873991-147 has two selectable clock inputs.

Features

Fourteen differential 3.3V LVPECL/ECL outputs.
Selectable differential LVPECL or REF_CLK inputs.
PCLK, nPCLK can accept the following input levels: LVPECL, CML, SSTL.
REF_CLK accepts the following input levels: LVCMOS, LVTTL.
Input clock frequency range: 6.25MHz to 125MHz.
Maximum output frequency: 500MHz.
VCO range: 200MHz to 1GHz.
Output skew: 70ps (typical).
Cycle-to-cyle jitter: 35ps (typical).
LVPECL.

Datasheet Details

Part number	ICS873991-147
Manufacturer	Integrated Device Technology
File Size	337.98 KB
Description	LOW VOLTAGE LVCMOS/LVPECL-TO LVPECL/ECL CLOCK GENERATOR
Datasheet	ICS873991-147 Datasheet
Additional preview pages of the ICS873991-147 datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com PRELIMINARY LOW VOLTAGE, LVCMOS/LVPECL-TO LVPECL/ECL CLOCK GENERATOR ICS873991-147 GENERAL DESCRIPTION The ICS873991-147 is a low voltage, low skew, 3.3V IC S LVPECL or ECL Clock Generator and a member of HiPerClockS™ the HiPerClockS™ family of High Performance Clock Solutions from IDT. The ICS873991-147 has two selectable clock inputs. The PCLK, nPCLK pair can accept an LVPECL input and the REF_CLK pin can accept a LVCMOS or LVTTL input. This device has a fully integrated PLL along with frequency configurable outputs. An external feedback input and output regenerates clocks with “zero delay”.

Published: Apr 13, 2010 |