ICS98ULPA877A - 1.8V Low-Power Wide-Range Frequency Clock Driver

Datasheet Summary

Low skew, low jitter PLL clock driver.
1 to 10 differential clock distribution (SSTL_18).
Feedback pins for input to output synchronization.
Spread Spectrum tolerant inputs.
Auto PD when input signal is at a certain logic state Switching Characteristics:.
Period jitter: 40ps (DDR2-400/533) 30ps (DDR2-667/800).
Half-period jitter: 60ps (DDR2-400/533) 50ps (DDR2-667/800).
OUTPUT - OUTPUT skew: 40ps (DDR2-400/533) 30ps (DDR2-.

Integrated Device Technology

Part number	ICS98ULPA877A
Manufacturer	Integrated Device Technology
File Size	155.41 KB
Description	1.8V Low-Power Wide-Range Frequency Clock Driver
Datasheet	ICS98ULPA877A Datasheet
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Integrated Circuit Systems, Inc. ICS98ULPA877A www.DataSheet4U.com Advance Information 1.

Published: Apr 12, 2010 |