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IDT71V416YL Datasheet

(IDT71V416YL/YS) 3.3V CMOS Static RAM 4 Meg

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3.3V CMOS Static RAM
4 Meg (256K x 16-Bit)
IDT71V416YS
IDT71V416YL
Features
256K x 16 advanced high-speed CMOS Static RAM
JEDEC Center Power / GND pinout for reduced noise.
Equal access and cycle times
– Commercial and Industrial: 10/12/15ns
One Chip Select plus one Output Enable pin
Bidirectional data inputs and outputs directly
LVTTL-compatible
Low power consumption via chip deselect
www.DataUSphpeeerta4nUd.cLoomwer Byte Enable Pins
Single 3.3V power supply
Available in 44-pin, 400 mil plastic SOJ package and a 44-
pin, 400 mil TSOP Type II package and a 48 ball grid array,
9mm x 9mm package.
Functional Block Diagram
Description
The IDT71V416 is a 4,194,304-bit high-speed Static RAM organized
as 256K x 16. It is fabricated using IDT’s high-perfomance, high-reliability
CMOS technology. This state-of-the-art technology, combined with inno-
vative circuit design techniques, provides a cost-effective solution for high-
speed memory needs.
The IDT71V416 has an output enable pin which operates as fast as
5ns, with address access times as fast as 10ns. All bidirectional inputs and
outputs of the IDT71V416 are LVTTL-compatible and operation is from a
single 3.3V supply. Fully static asynchronous circuitry is used, requiring
no clocks or refresh for operation.
The IDT71V416 is packaged in a 44-pin, 400 mil Plastic SOJ and a
44-pin, 400 mil TSOP Type II package and a 48 ball grid array, 9mm x
9mm package.
Output
OE Enable
Buffer
A0 - A17
Address
Buffers
Chip
CS Select
Buffer
Write
WE Enable
Buffer
BHE
BLE
Byte
Enable
Buffers
©2004 Integrated Device Technology, Inc.
Row / Column
Decoders
4,194,304-bit
Memory
Array
8
Sense
16 Amps
and
Write
Drivers
8
8
8
High
Byte
Output
Buffer
High
Byte
Write
Buffer
Low
Byte
Output
Buffer
Low
Byte
Write
Buffer
8
8
8
8
I/O 1
I/O 8
I/O 7
I/O 0
6442 drw 01
JULY 2004
1
DSC-6442/01


Integrated Device Technology Electronic Components Datasheet

IDT71V416YL Datasheet

(IDT71V416YL/YS) 3.3V CMOS Static RAM 4 Meg

No Preview Available !

IDT71V416YS, IDT71V416YL 3.3V CMOS Static RAM
4 Meg (256K x 16-Bit)
Pin Configurations - SOJ/TSOP
A0 1
A1 2
A2 3
A3 4
A4 5
CS 6
I/O 0
7
I/O 1
8
I/O 2
9
I/O 3
10
VDD
11
VSS 12
I/O 4
13
www.DataShIe/Oet54U.com14
I/O 6
15
I/O 7
WE
16
17
A5 18
A6 19
A7 20
A8 21
A9 22
44 A17
43 A16
42 A15
41 OE
40 BHE
39 BLE
38 I/O 15
37 I/O 14
36 I/O 13
35 I/O 12
SO44-1
SO44-2
34
33
VSS
VDD
32 I/O 11
31 I/O 10
30 I/O 9
29 I/O 8
28 NC*
27 A14
26 A13
25 A12
24 A11
23 A10
Commercial and Industrial Temperature Ranges
Pin Configurations - 48 BGA
12 3 4 5 6
A BLE
OE
A0
A1
A2
NC
B I/O0
BHE
A3
A4
CS I/O8
C I/O1
I/O2
A5
A6
I/O10
I/O9
D VSS I/O3 A17
A7
I/O11
VDD
E VDD
I/O4
NC
A16 I/O12 VSS
F I/O6
I/O5
A14
A15
I/O13
I/O14
G I/O7 NC A12 A13 WE I/O15
H NC
A8
A9
A10 A11 NC
6442 tbl 11
6442 drw 02
*Pin 28 can either be a NC or connected to Vss
Top View
Pin Descriptions
A0 - A17
Address Inputs
CS Chip Select
WE Write Enable
OE Output Enable
BHE High Byte Enable
BLE Low Byte Enable
I/O0 - I/O15
Data Input/Output
VDD 3.3V Power
VSS Ground
Input
Input
Input
Input
Input
Input
I/O
Pwr
Gnd
6442 tbl 01
SOJ Capacitance
(TA = +25°C, f = 1.0MHz)
Symbol
Parameter(1)
CIN Input Capacitance
CI/O I/O Capacitance
Conditions
VIN = 3dV
VOUT = 3dV
Max. Unit
7 pF
8 pF
6442 tbl 02
48 BGA Capacitance
(TA = +25°C, f = 1.0MHz)
Symbol
Parameter(1)
Conditions
Max. Unit
CIN
Input Capacitance
VIN = 3dV
6 pF
CI/O
I/O Capacitance
VOUT = 3dV
7 pF
NOTE:
6442 tbl 02b
1. This parameter is guaranteed by device characterization, but not production
tested.
6.422


Part Number IDT71V416YL
Description (IDT71V416YL/YS) 3.3V CMOS Static RAM 4 Meg
Maker Integrated Device Technology
Total Page 9 Pages
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