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Integrated Device Technology Electronic Components Datasheet

IDT74FCT810CT Datasheet

FAST CMOS BUFFER/CLOCK DRIVER

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Integrated Device Technology, Inc.
FAST CMOS
BUFFER/CLOCK DRIVER
IDT54/74FCT810BT/CT
FEATURES:
• 0.5 MICRON CMOS technology
• Guaranteed low skew < 600ps (max.)
• Very low duty cycle distortion < 700ps (max.)
• Low CMOS power levels
• TTL compatible inputs and outputs
• TTL level output voltage swings
• High drive: –32mA IOH, 48mA IOL
• Two independent output banks with 3-state control
– One 1:5 Inverting bank
– One 1:5 Non-Inverting bank
• ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
• Available in DIP, SOIC, SSOP, QSOP, CERPACK and
LCC packages
• Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT54/74FCT810BT/CT is a dual bank inverting/ non-
inverting clock driver built using advanced dual metal CMOS
technology. It consists of two banks of drivers, one inverting
and one non-inverting. Each bank drives five output buffers
from a standard TTL-compatible input. The IDT54/
74FCT810BT/CT have low output skew, pulse skew and
package skew. Inputs are designed with hysteresis circuitry
for improved noise immunity. The outputs are designed with
TTL output levels and controlled edge rates to reduce signal
noise. The part has multiple grounds, minimizing the effects of
ground inductance.
FUNCTIONAL BLOCK DIAGRAMS
PIN CONFIGURATIONS
OEA
INA
OEB
INB
5
OA1-OA5
5
OB1-OB5
3103 drw 01
VCC
1
20 VCC
OA1
2
19 OB1
OA2
3
18 OB2
OA3
GND
OA4
OA5
4
P20-1
17
5
D20-1
SO20-2
16
6
SO20-7
SO20-8
15
&
7
E20-1
14
OB3
GND
OB4
OB5
GND
8
13 GND
OEA
9
12 OEB
INA 10
11 INB
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
3103 drw 02
INDEX
OA3
GND
OA4
OA5
GND
32
20 19
4 1 18
5 17
6
L20-2
16
7 15
8 14
9 10 11 12 13
OB2
OB3
GND
OB4
OB5
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1995 Integrated Device Technology, Inc.
9.4
LCC
TOP VIEW
3103 drw 03
OCTOBER 1995
DSC-4646/3
1


Integrated Device Technology Electronic Components Datasheet

IDT74FCT810CT Datasheet

FAST CMOS BUFFER/CLOCK DRIVER

No Preview Available !

IDT54/74FCT810BT/CT
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Pin Names
OEA, OEB
Description
3-State Output Enable Inputs (Active LOW)
INA, INB
OAn, OBn
Clock Inputs
Clock Outputs
3103 tbl 01
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol Parameter(1) Conditions Typ. Max. Unit
CIN Input
Capacitance
VIN = 0V
4.5 6.0 pF
COUT Output
VOUT = 0V 5.5 8.0 pF
Capacitance
NOTE:
3103 lnk 02
1. This parameter is measured at characterization but not tested.
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Rating
VTERM(2) Terminal Voltage
with Respect to
GND
VTERM(3) Terminal Voltage
with Respect to
GND
TA Operating
Temperature
TBIAS Temperature
Under Bias
TSTG Storage
Temperature
Commercial
–0.5 to +7.0
–0.5 to VCC
+0.5
0 to +70
–55 to +125
–55 to +125
Military
–0.5 to +7.0
–0.5 to VCC
+0.5
–55 to +125
–65 to +135
–65 to +150
Unit
V
V
°C
°C
°C
IOUT
DC Output
–60 to +120 –60 to +120 mA
Current
NOTES:
3103 lnk 03
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability. No terminal voltage may exceed
VCC by +0.5V unless otherwise noted.
2. Input and VCC terminals.
3. Output and I/O terminals.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol
VIH
Parameter
Input HIGH Level
Test Conditions(1)
Guaranteed Logic HIGH Level
Min. Typ.(2) Max. Unit
2.0 — —
V
VIL Input LOW Level
II H Input HIGH Current(5)
II L Input LOW Current(5)
Guaranteed Logic LOW Level
VCC = Max.
VI = 2.7V
VCC = Max.
VI = 0.5V
— — 0.8 V
— — ±1 µA
— — ±1 µA
IOZH
IOZL
II
High Impedance Output Current
(3-State Output pins)(5)
Input HIGH Current(5)
VCC = Max.
VO = 2.7V
VO = 0.5V
VCC = Max., VI = VCC (Max.)
— — ±1 µA
— — ±1 µA
— — ±1 µA
VIK Clamp Diode Voltage
IOS Short Circuit Current
VCC = Min., IIN= –18mA
VCC = Max.(3), VO = GND
— –0.7 –1.2 V
–60 –120 –225 mA
VOH Output HIGH Voltage
VCC = Min.
IOH = –12mA MIL.
2.4 3.3 —
V
VIN = VIH or VIL
IOH = –15mA COM'L.
IOH = –24mA MIL.
2.0
IOH = –32mA COM'L.(4)
3.0
VOL Output LOW Voltage
VCC = Min.
IOL = 32mA MIL.
— 0.3 0.55 V
VIN = VIH or VIL
IOL = 48mA COM'L.
IOFF Input/Output Power Off Leakage(5) VCC = 0V, VIN or VO 4.5V
— — ±1 µA
VH Input Hysteresis for all inputs
— — 150 — mV
ICCL
ICCH
ICCZ
Quiescent Power Supply Current VCC = Max., VIN = GND or VCC
— 5 500
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. The test limit for this parameter is ± 5µA at TA = –55°C.
µA
3103 lnk 04
9.4 2


Part Number IDT74FCT810CT
Description FAST CMOS BUFFER/CLOCK DRIVER
Maker Integrated Device Technology
Total Page 6 Pages
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