IDT8SLVD1204I - LVDS Output Fanout Buffer

Integrated Device Technology

Datasheet Details

Part number	IDT8SLVD1204I
Manufacturer	Integrated Device Technology
File Size	561.52 KB
Description	LVDS Output Fanout Buffer
Datasheet	IDT8SLVD1204I Datasheet

The IDT8SLVD1204I is a high-performance differential LVDS fanout buffer.

The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals.

The IDT8SLVD1204I is characterized to operate from a 2.5V power supply.

2:4, LVDS Output Fanout Buffer, 2.5V IDT8SLVD1204I DATA SHEET.

Four low skew, low additive jitter LVDS output pairs.
Two selectable differential clock input pairs.
Differential PCLK, nPCLK pairs can accept the following differential input levels: LVDS, LVPECL.
Maximum input clock frequency: 2GHz.
LVCMOS/LVTTL interface levels for the control input select pin.
Output skew: 20ps (maximum).
Propagation delay: 300ps (maximum).
Low additive phase jitter, RMS; fREF = 156.25MHz, VPP = 1V, 10k.

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