Datasheet Details
| Part number | RC32434 |
|---|---|
| Manufacturer | Integrated Device Technology |
| File Size | 1.09 MB |
| Description | IDT Interprise Integrated Communications Processor |
| Datasheet |
 RC32434 Datasheet
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General Description
for MADDR[3:0] www.DataSheet4U.com and changed 4096 cycles to 4000 for MADDR[7].
(Note: MADDR was incorrectly labeled as MDATA in previous data sheet.) March 29, 2004: Added Standby mode to Table 16, Power Consumption.
April 19, 2004: Added the I2C feature.
Key Features
- 32-bit CPU Core.
- MIPS32 instruction set.
- Cache Sizes: 8KB instruction and data caches, 4-Way set associative, cache line locking, non-blocking prefetches.
- 16 dual-entry JTLB with variable page sizes.
- 3-entry instruction TLB.
- 3-entry data TLB.
- Max issue rate of one 32x16 multiply per clock.
- Max issue rate of one 32x32 multiply every other clock.
- CPU control with start, stop, and single stepping.
- Software break.