IS42VS16100C1 - 512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM

Integrated Silicon Solution

The IS42VS16100C1 by Integrated Silicon Solution is a 512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM. Below is the official datasheet preview.

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IS42VS16100C1 512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM by Integrated Silicon Solution - Datasheet Preview — Official preview page of the **IS42VS16100C1** 512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM datasheet (Integrated Silicon Solution).

Datasheet Details

Part number	IS42VS16100C1
Manufacturer	Integrated Silicon Solution
File Size	837.26 KB
Description	512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM
Datasheet	IS42VS16100C1_IntegratedSiliconSolution.pdf
Additional preview pages of the IS42VS16100C1 datasheet.

IS42VS16100C1 Product details

Description

ISSI’s 16Mb Synchronous DRAM IS42VS16100C1 is organized as a 524,288-word x 16-bit x 2-bank for improved performance.The synchronous DRAMs achieve high-speed data transfer using pipeline architecture.All inputs and outputs signals refer to the rising edge of the clock input.PIN CONFIGURATIONS 50-Pin TSOP (Type II) VDD DQ0 DQ1 GNDQ DQ2 DQ3 VDDQ DQ4 DQ5 GNDQ DQ6 DQ7 VDDQ LDQM WE CAS RAS CS A11 A10 A0 A1 A2 A3 VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 50 49 48 47 46

Features

Clock frequency: 100 MHz.
Fully synchronous; all signals referenced to a positive clock edge.
Two banks can be operated simultaneously and independently.
Dual internal bank controlled by A11 (bank select).
Single 1.8V power supply.
LVTTL interface.
Programmable burst length.
(1, 2, 4, 8, full page).
Programmable burst sequence: Sequential/Interleave.
2048 refresh cycles every 32 ms.
Random column.

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Published: Apr 22, 2010 |