IS61DDPB22M18B2 sram equivalent, 36mb ddr-iip(burst 2) cio synchronous sram.
DESCRIPTION
* 1Mx36 and 2Mx18 configuration available.
* On-chip Delay-Locked Loop (DLL) for wide data valid window.
* Common I/O read and write ports.
.
where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system o.
Image gallery
Download