IS61LP6432A
Overview
- Internal self-timed write cycle
- Individual Byte Write Control and Global Write
- Clock controlled, registered address, data and control
- Pentium™ or linear burst sequence control using MODE input
- Three chip enables for simple depth expansion and address pipelining
- Common data inputs and data outputs
- JEDEC 100-Pin TQFP package
- Power-down snooze mode
- Power Supply: +3.3V VDD +3.3V or 2.5V VDDQ (I/O)
- Lead-free available ISSI ®
