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IS61NLP409618B Datasheet PIPELINE (NO WAIT) STATE BUS SRAM

Manufacturer: ISSI (now Infineon)

Download the IS61NLP409618B datasheet PDF. This datasheet also includes the IS61NLP204836B variant, as both parts are published together in a single manufacturer document.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IS61NLP204836B-IntegratedSiliconSolution.pdf) that lists specifications for multiple related part numbers.

General Description

The 72 Meg product family

Overview

IS61NLP204836B/IS61NVP/NVVP204836B IS61NLP409618B/IS61NVP/NVVP409618B  2M x 36 and 4M x 18 JULY 2019 72Mb, PIPELINE 'NO WAIT' STATE BUS.

Key Features

  • 100 percent bus utilization.
  • No wait cycles between Read and Write.
  • Internal self-timed write cycle.
  • Individual Byte Write Control.
  • Single R/W (Read/Write) control pin.
  • Clock controlled, registered address, data and control.
  • Interleaved or linear burst sequence control us- ing MODE input.
  • Three chip enables for simple depth expansion and address pipelining.
  • Power Down mode.
  • Common data inputs and data out.

More Datasheets from ISSI (now Infineon)

Part Number Description
IS61NLP102436A 36Mb STATE BUS SRAM
IS61NLP204818A 36Mb STATE BUS SRAM
IS61NLP204836B PIPELINE (NO WAIT) STATE BUS SRAM
IS61NLF204836B FLOW THROUGH (NO WAIT) STATE BUS SRAM
IS61NLF409618B FLOW THROUGH (NO WAIT) STATE BUS SRAM
IS61NLF51236 STATE BUS SRAM
IS61NSCS25672 Synchronous SRAM
IS61NSCS51236 Synchronous SRAM
IS61NVF102418 STATE BUS SRAM
IS61NVF204836B FLOW THROUGH (NO WAIT) STATE BUS SRAM