62C1024L Datasheet | ISSI

IS62C1024L 128K x 8 LOW POWER CMOS STATIC RAM ISSI DECEMBER 2003 ® Features - High-speed access time: 35, 70 ns - Low active power: 450 m W (typical) - Low standby power: 150 µW (typical) CMOS standby - Output Enable (OE) and two Chip Enable (CE1 and CE2) inputs for ease in applications - Fully static operation: no clock or refresh required - TTL patible inputs and outputs - Single 5V (±10%) power supply DESCRIPTION The ISSI IS62C1024L is a low power,131,072-word by 8-bit CMOS static RAM. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices. When CE1 is HIGH or CE2 is LOW (deselected), the device assumes a standby mode at which the power dissipation can be reduced by using CMOS input levels. Easy memory expansion is provided by using two Chip Enable inputs, CE1 and CE2. The active LOW Write Enable (WE) controls both writing and reading of the memory. The IS62C1024L is available in 32-pin plastic SOP and TSOP (type 1) packages. FUNCTIONAL BLOCK DIAGRAM A0-A16 DECODER 128K x 8 MEMORY ARRAY VDD GND I/O DATA CIRCUIT I/O0-I/O7 COLUMN I/O CE1 CE2 OE WE CONTROL CIRCUIT Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. - 1-800-379-4774 Rev. E 11/26/03 IS62C1024L PIN CONFIGURATION 32-Pin...