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International Rectifier Electronic Components Datasheet

IP1001 Datasheet

Full Function Synchronous Buck Power Block

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PD - 94336c
iP1001
Full Function Synchronous Buck Power Block
Integrated Power Semiconductors, Control IC & Passives
Features
• 3.3V to 12V input voltage1
• 20A maximum load capability, with no derating up to TPCB = 90°C
• 5 bit DAC settable, 0.925V to 2V output voltage range 2
• Configurable down to 3.3Vin & up to 3.3Vout with simple external circuit 3
• 200kHz or 300kHz nominal switching frequency
• Optimized for very low power losses
• Over & undervoltage protection
• Adjustable lossless current limit
• Internal features minimize layout sensitivity *
• Very small outline 14mm x 14mm x 3mm
iP1001 Power Block
Description
The iP1001 is a fully optimized solution for high current synchronous buck applications requiring up to 20A.
The iP1001 is optimized for single-phase applications, and includes a full function fast transient response
PWM control, with an optimized power semiconductor chip-set and associated passives, achieving benchmark
power density. Very few external components are required, including output inductor, input & output capacitors.
Further range of operation to 3.3Vin can be achieved with the addition of a simple external boost circuit, and
operation up to 3.3Vout can be achieved with a simple external voltage divider.
iPOWIR technology offers designers an innovative board space-saving solution for applications requiring high
power densities. iPOWIR technology eases design for applications where component integration offers
benefits in performance and functionality. iPOWIR technology solutions are also optimized internally for layout,
heat transfer and component selection.
iP1001 Internal Block Diagram
5 Bit
DAC
D0
D1
D2
D3
D4
ENABLE
PGOOD
IL IM
FREQ
VDD
PWM
& Driver
VIN
VSW
SGND GNDS VFS VF PGND
* Although, all of the difficult PCB layout and bypassing issues have been addressed with the internal design of the iPOWIR block, proper layout techniques should be
applied for the design of the power supply board. There are no concerns about unwanted shutdowns common to switching power supplies, if operated as specified. The
iPOWIR block will function normally, but not optimally without any additional input decoupling capacitors. Input decoupling capacitors should be added at Vin pin for stable
and reliable long term operation. No additional bypassing is required on the Vdd pin. See layout guidelines in datasheet for more detailed information.
www.irf.com
05/20/03
1


International Rectifier Electronic Components Datasheet

IP1001 Datasheet

Full Function Synchronous Buck Power Block

No Preview Available !

iP1001
All specifications @ 25°C (unless otherwise specified)
Absolute Maximum Ratings
Parameter
VIN to PGND
VDD to PGND
VFS
VF
D0-D4
PGOOD to PGND
ENABLE to PGND
ILIM
FREQ
Output RMS Current
Block Temperature
Symbol
Min
Typ
Max
Units
-0.3 - 16.0
-0.3 -
6.0
-0.3 - VDD+0.3
-0.3 - VDD+0.3
-0.3
-
VDD+0.3
V
-0.3 -
6.0
-0.3 -
6.0
-0.3 - VDD+0.3
-0.3 - VDD+0.3
- - 20 A
TBLK -40 - 125 °C
Conditions
Recommended Operating Conditions
Parameter
Supply Voltage
Input Voltage Range 1
Output RMS Current from VSW 4
Symbol
VDD
VIN
IoutVSW
Output Voltage Range 2
VOUT
Min
4.5
3.3
-
0.925
Typ
-
-
-
-
Max
5.5
12
20
2.0
Units
V
A
V
Conditions
With 4.5V<VDD<5.5V
DAC Setting
see VID code, Table1.
Electrical Specifications @ VDD = 5V & TPCB 0°C - 90°C (Unless otherwise specified)
Parameter
Power Loss
Over Current Shutdown
Soft Start Time
Output Voltage Accuracy
VF Input Resistance
Frequency
VDD Undervoltage Lockout
Output Undervoltage Shutdown
Threshold
Output Undervoltage Protection
Blanking Time
Output Overvoltage Shutdown
Threshold at VF
PGOOD Trip Threshold
PGOOD Leakage Current
PGOOD Output Low Voltage
Logic Input High Voltage
Logic Input Low Voltage
Symbol
PLOSS
FREQ
PGOOD
Min Typ Max
- 3.1 3.9
- 25 -
- 1.8 -
-2 -
2
- 181 -
- 200 -
- 300 -
- 4.2 -
- 0.8 -
- 20 -
- 2.25 -
- VDAC -5% -
-1-
- - 0.4
2.4 -
-
- - 0.8
Units
W
A
ms
%
k
kHz
V
V
Conditions
300kHz, 12VIN, 1.3Vout, 20A
VIN=12V, VOUT=1.3V,
FREQ=300KHz, RLIM=340k
All DAC codes
TBLK = -40°C to 125°C
freq pin connected to VDD
freq pin floating
200mV hysteresis
ms ENABLE going high on start-up
V
See OVP note in Design
Guidelines
V At VF
µA
PGOOD output high
Forced to 5.5V
V Isink = 1mA
V D0-D4, Enable
V D0-D4, Enable
2 www.irf.com


Part Number IP1001
Description Full Function Synchronous Buck Power Block
Maker International Rectifier
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IP1001 Datasheet PDF






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