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International Rectifier Electronic Components Datasheet

IRS2112 Datasheet

HIGH AND LOW SIDE DRIVER

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Data Sheet No. PD60251
IRS2112(-1,-2,S)PbF
HIGH AND LOW SIDE DRIVER
Features
Floating channel designed for bootstrap operation Product Summary
Fully operational to +600 V
Tolerant to negative transient voltage, dV/dt
VOFFSET
600 V max.
immune
Gate drive supply range from 10 V to 20 V
Undervoltage lockout for both channels
3.3 V logic compatible
Separate logic supply range from 3.3 V to 20 V
Logic and power ground +/- 5 V offset
CMOS Schmitt-triggered inputs with pull-down
Cycle by cycle edge-triggered shutdown logic
Matched propagation delay for both channels
Outputs in phase with inputs
RoHS compliant
IO+/-
200 mA / 440 mA
VOUT
10 V - 20 V
ton/off (typ.) 135 ns & 105 ns
Delay Matching
30 ns
Packages
Description
The IRS2112 is a high voltage, high speed power
MOSFET and IGBT driver with independent high- and
low-side referenced output channels. ProprietarywHwwV.DIaCtaSheet4U.com
14-Lead PDIP
IRS2112
16-Lead PDIP
(w/o leads 4 & 5)
IRS2112-2
and latch immune CMOS technologies enable rug-
gedized monolithic construction. Logic inputs are com-
patible with standard CMOS or LSTTL outputs, down
to 3.3 V logic. The output drivers feature a high pulse
current buffer stage designed for minimum driver
cross-conduction. Propagation delays are matched
14-Lead PDIP
(w/o lead 4)
IRS2112-1
16-Lead SOIC
IRS2112S
to simplify use in high frequency applications. The
floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side configuration
which operates up to 600 V.
Typical Connection
up to 600 V
VDD
HIN
SD
LIN
VSS
VCC
HO
VDD
VB
HIN
VS
SD
LIN
VCC
VSS
COM
LO
(Refer to Lead Assignments for correct pin configuration). This diagram shows electrical connections only. Please
refer to our Application Notes and DesignTips for proper circuit board layout.
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International Rectifier Electronic Components Datasheet

IRS2112 Datasheet

HIGH AND LOW SIDE DRIVER

No Preview Available !

IRS2112(-1,-2,S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figs. 28 through 35.
Symbol
Definition
Min.
Max. Units
VB
VS
VHO
VCC
VLO
VDD
VSS
VIN
dVs/dt
PD
High-side floating supply voltage
High-side floating supply offset voltage
High-side floating output voltage
Low-side fixed supply voltage
Low- side output voltage
Logic supply voltage
Logic supply offset voltage
Logic input voltage (HIN, LIN & SD)
Allowable offset supply voltage transient (Fig. 2)
(14 Lead DIP)
Package power dissipation @ TA +25 °C
(16 Lead SOIC)
-0.3
VB - 25
VS - 0.3
-0.3
-0.3
-0.3
VCC - 25
VSS - 0.3
625
VB + 0.3
VB + 0.3
25
VCC + 0.3
VSS + 25
VCC + 0.3
VDD + 0.3
50
1.6
1.25
V
V/ns
W
(14 Lead DIP)
RTHJA
Thermal resistance, junction to ambient
(16 Lead SOIC)
75
°C/W
100
TJ
Junction temperature
TS
Storage temperature
150
-55
150
°C
TL
Lead temperature (soldering, 10 seconds)
Recommended Operating Conditions
300
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15 V differential. Typical
ratings at other bias conditions are shown in Figs. 36 and 37.
Symbol
Definition
Min.
Max. Units
VB
High-side floating supply absolute voltage
VS + 10
VS + 20
VS
High-side floating supply offset voltage
Note 1
600
VHO
High-side floating output voltage
VS
VB
VCC
Low-side fixed supply voltage
VLO
Low- side output voltage
10
20
0
VCC
V
VDD
Logic supply voltage
VSS + 3
VSS + 20
VSS
Logic supply offset voltage
-5 (Note 2)
5
VIN
Logic input voltage (HIN, LIN & SD)
VSS
VDD
TA
Ambient temperature
-40
125
°C
Note 1: Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design
Tip DT97-3 for more details).
Note 2: When VDD < 5 V, the minimum VSS offset is limited to -VDD.
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Part Number IRS2112
Description HIGH AND LOW SIDE DRIVER
Maker International Rectifier
PDF Download

IRS2112 Datasheet PDF






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