Description
TSSOP PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
SYMBOL RH3 RL3 RW3 A2 SCL SDA GND RW2 RL2 RH2 RW1 RL1 RH1 A0 A1 VCC SHDN RH0 RL0 RW0
GND
DESCRIPTION “High” terminal of DCP3 “Low” terminal of DCP3 “Wiper” terminal of DCP3 Device address input for the I2C interface Open drain I2C inter
Features
- Specifications per DSCC VID V62/08605-01XE.
- Full Mil-Temp Electrical Performance from -55°C to +125°C.
- Controlled Baseline with One Wafer Fabrication Site and One Assembly/Test Site.
- Full Homogeneous Lot Processing in Wafer Fab.
- No Combination of Wafer Fabrication Lots in Assembly.
- Full Traceability Through Assembly and Test by Date/Trace Code Assignment.
- Enhanced Process Change Notification.
- Enhanced Obsolescence Managemen.
22346WMVEP Datasheet
