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# HC5509 Datasheet

### Impedance Matching Design Equations

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Impedance Matching Design Equations for the
TM HC5509 Series of SLICs
Application Note
October 1996
AN9607.1
Introduction
The HC5509 Series of SLICs use feedback to synthesize the
impedance at the 2-wire tip and ring terminals. The network
is capable of synthesizing both resistive and complex imped-
ances. Matching the SLIC’s 2-wire impedance to the load is
important to maximize power transfer and 2-wire return loss.
The 2-wire return loss is a measure of the similarity of the
impedance of a transmission line (tip and ring) and the
impedance at it’s termination. It is a ratio, expressed in deci-
bels, of the power of the outgoing signal to the power of the
signal reflected back from an impedance discontinuity.
This application note will discuss the basic DC operation of
the tip and ring amplifiers for an understanding of the reac-
tion between the tip and ring amplifiers, the requirements for
impedance matching and the derivation of the design equa-
tions for calculating the required feedback components for
both resistive and complex impedances. The analysis will
use the HC5509B as the basis for the discussion. Design
solutions for the HC5509A1R3060, HC5524 and HC5517
are provided in Table 1.
Tip and Ring Amplifiers
The tip and ring amplifiers are voltage feedback op amps
that are connected to generate a differential output (e.g. if tip
sources 20mA then ring sinks 20mA). Figure 1 shows the
connection of the tip and ring amplifiers. The tip DC voltage
is set by an internal +2V reference, resulting in -4V at the
output. The ring DC voltage is set by the tip DC output volt-
age and an internal VBAT/2 reference, resulting in VBAT +4V
at the output (see Equations 1, 2 and 3).
VTIP FEED
=
VC
=
2
V
R----R-----2- 
=
4V
VRING
FEED
=
VD
=
V-----B-2---A---T--
1
+
RR--- 
VTIP
F
E
E
D
RR---
(EQ. 1)
(EQ. 2)
VD = VBAT + 4
(EQ. 3)
R
TIP FEED
RB1 RB2
AC
-
+ VC
-
+
RL
2R VOUT1 GROUNDED
FOR DC
2R ANALYSIS
VFB
R
VRX
R/2
+
-
2VDC
+
-
VIN
RR
BD
RB3 RB4
RING FEED
-
+
+
-
VD
+-
VBAT
2
FIGURE 1. OPERATION OF THE TIP AND RING AMPLIFIERS
Requirements for Impedance matching
Impedance matching of the HC5509B application circuit to
the transmission line requires that the impedance be
matched to points “A” and “B” in Figure 2. To do this, the
sense resistors RB1, RB2, RB3 and RB4 must be accounted
for by the feedback network to make it appear as if the out-
put of the tip and ring amplifiers are at points “A” and “B”.
The feedback network takes a voltage that is equal to the
voltage drop across the sense resistors and feeds it into the
summing node of the tip amplifier. The effect of this is to
cause the tip feed voltages to become more negative by a
value that is proportional to the voltage drop across the
sense resistors RB1 and RB2. At the same time the ring
amplifier becomes more positive by the same amount to
account for resistors RB3 and RB4.
The net effect cancels out the voltage drop across the feed
resistors. By nullifying the effects of the feed resistors the
feedback circuitry becomes relatively easy to match the
impedance at points “A” and “B”.
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.

 Intersil Electronic Components Datasheet

# HC5509 Datasheet

### Impedance Matching Design Equations

 No Preview Available !
Application Note 9607
IR
R
2R VOUT1
+ IL - + IL -
RB1
A
RB2
C
-
+ VC
-
+
-
2R
VFB
R
VRX
R/2
+
-
2VDC
IVFB = 4RSIL
2R
GROUNDED
FOR AC
ANALYSIS
IVOUT1 =
4RSIL
KZO
KRF
2R
IL
RL +
VIN
+
-
-
IL
+
RB1 = RB2 = RB3 = RB4 = RS
+RSIL
-
+
+
-
-RSIL
2
+-
VTX
KRF
-
4RSIL
+
-IN1
KZO
-
+
-
4RSIL
KZO
KRF
+
B
RB3
RB4
D
- IL + - IL +
RR
-
+
+
-
VD
+-
VBAT
2
GROUNDED
FOR AC
ANALYSIS
FIGURE 2. FEEDBACK NETWORK FOR IMPEDANCE MATCHING
Impedance Matching Design Equations
Before writing the loop equation to solve for the proper feed-
back to match the SLICs 2-wire impedance to the load, the
AC voltage at VC and VD (Figure 2) must first be determined.
The feedback loop senses the loop current through resistors
RB2 and RB4. For the current direction shown in Figure 2 the
VTX output is equal to +4RSIL. The VTX outputs feedback
into the tip current summing node via the VFB pin. The cur-
rent into VFB is equal to:
IVFB = 4----R---2--S--R------I--L-
(EQ. 5)
The VTX voltage is also feed into the -IN input of the SLIC’s
internal op amp. This signal is amplified by the ratio
KZ0/KRF then feed into the tip current summing node via the
VOUT1 pin. (Note: the VRX pin and the internal +2V refer-
ence are grounded for the AC analysis.) The current into the
VOUT1 pin is equal to:
IVOUT1
=
4----R---2--S--R------I--L-
R-Z----0F-- 
(EQ. 6)
Equation 7 is the node equation for the tip amplifier summing
node. The current in the tip feedback resistor (IR) is given in
Equation 8.
IR
+
4----R---2--S--R------I--L-
-4---R---2--S--R------I--L--
R-Z----F0--
=
0
(EQ. 7)
IR
=
4----R---2--S--R------I--L-
-4---R---2--S--R------I--L-
R-Z----0F--
(EQ. 8)
The voltage VC is then equal to:
VC = (IR)(R)
(EQ. 9)
VC = –2RSIL1 R-Z----0F--
(EQ. 10)
and the AC voltage at VD is:
VD
=
2
RS
IL
1
R-Z----0F--
(EQ. 11)
(Note VBAT/2 is grounded for AC analysis)
Having the voltages at VC and VD, as a function of the feed-
back network, the loop equation to match the impedance of
2
R
S
IL
1
R-Z----F0--
+
2RS ILVIN
+
L IL + 2RSIL2 RSIL1 R-Z----0F-- = 0
(EQ. 12
VIN = –4RSIL1 R-Z----0F--  + 4RSIL + RLIL
VIN
=
IL
4
R
S
1
R-Z----0F-- 
+
4RS
+
RL
(EQ. 13)
(EQ. 14)
2

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