ISL22326WM
Description
Power supply pin Shutdown active low input “High” terminal of DCP0 “Low” terminal of DCP0 “Wiper” terminal of DCP0 Device address input for the I2C interface Open drain I2C interface clock input Open drain Serial data I/O for the I2C interface Device ground pin “Wiper” terminal of DCP1 “Low” terminal of DCP1 “High” terminal of DCP1 Device address input for the I2C interface Device address input for the I2C interface FN6623 Rev 1.00 November 11, 2011 Page 2 of 3 ISL22326WM Thin Shrink Small Outline Plastic Packages (TSSOP) N INDEX AREA E E1 -B- 0.25(0.010) M B M GAUGE PLANE 123 0.05(0.002) SEATING PLANE -A- D A L 0.25 0.010 -C- e A1 A2 c b 0.10(0.004) 0.10(0.004) M C A M B S NOTES: 1.
Key Features
- Specifications per DLA VID V62/08604-01XE
- Full Mil-Temp Electrical Performance from -55°C to +125°C
- Controlled Baseline with One Wafer Fabrication Site and One Assembly/Test Site
- Full Homogeneous Lot Processing in Wafer Fab
- No bination of Wafer Fabrication Lots in Assembly
- Full Traceability Through Assembly and Test by Date/Trace Code Assignment
- Enhanced Process Change Notification
- Enhanced Obsolescence Management
- Eliminates Need for Up-Screening a COTS ponent
- Two Potentiometers in One Package
