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Intersil Electronic Components Datasheet

6225CA Datasheet

ISL6225CA

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Data Sheet
September 2003
ISL6225
FN9049.4
Dual Mobile-Friendly PWM Controller with
DDR Memory Option
The ISL6225 dual PWM controller delivers high efficiency and
tight regulation from two voltage regulating synchronous buck
DC/DC converters. The ISL6225 PWM power supply controller
was designed especially for DDR DRAM, SDRAM, and graphic
chipset applications in high performance desknote PCs,
notebook PCs, sub-notebook PCs, and PDAs.
Automatic mode selection of constant-frequency synchronous
rectification at heavy load, and hysteretic diode-emulation at
light load, assure high efficiency over a wide range of
conditions. The hysteretic mode of operation can be disabled
separately on each PWM converter if constant-frequency
continuous-conduction operation is desired for all load levels.
Efficiency is further enhanced by using the lower MOSFET
RDS(ON) as the current sense element.
Voltage-feed-forward ramp modulation, average current mode
control, and internal feedback compensation provide fast
response to input voltage and output load transients. Input
current ripple is minimized by channel to channel PWM
phase shift of 0°, 90°, or 180° determined by input voltage
and status of the DDR pin.
The ISL6225 can control two independent output voltages
adjustable from 0.9V to 5.5V or, by activating the DDR pin,
transform into a complete DDR memory power supply
solution. In DDR mode, CH2 output voltage VTT tracks CH1
output voltage VDDQ. CH2 output can both source and sink
current, an essential power supply feature for DDR memory
systems. The reference voltage VREF required by DDR
memory is generated as well.
In dual power supply applications the ISL6225 monitors the
output voltage of both CH1 and CH2. An independent
PGOOD (power good) signal is asserted for each channel
after the soft-start sequence has completed, and the output
voltage is within ±10% of the set point. In DDR mode CH1
generates the only PGOOD signal.
Built-in over-voltage protection prevents the output from
going above 115% of the set point by holding the lower
MOSFET on and the upper MOSFET off. When the output
voltage decays below the over-voltage threshold, normal
operation automatically resumes. Once the soft-start
sequence has completed, under-voltage protection may
latch the ISL6225 off if either output drops below 75% of its
set point value.
Adjustable over-current protection (OCP) monitors the
voltage drop across the RDS(ON) of the lower MOSFET. If
more precise current-sensing is required, an external current
sense resistor may be used.
Ordering Information
PART NUMBER TEMP. (oC) PACKAGE
PKG. NO.
ISL6225CA
-10 to 85
28 Ld SSOP
M28.15
ISL6225CA-T
-10 to 85 28 Ld SSOP Tape
and Reel
M28.15
Features
• Provides regulated output voltage in the range of 0.9V-5.5V
- High efficiency over wide load range
- Synchronous buck converter with hysteretic operation at
light load
- Inhibit Hysteretic mode on one, or both channels
• Complete DDR memory power solution
- VTT tracks VDDQ/2
- VDDQ/2 buffered reference output
• No current-sense resistor required
- Uses MOSFET RDS(ON)
- Optional current-sense resistor for precision Over-Current
• Under-voltage lock-out on VCC pin
• Dual input voltage mode operation
- Operates directly from battery 5V to 24V input
- Operates from 3.3V or 5V system rail
- VCC from 5V only
• Excellent dynamic response
- Combined voltage feed-forward and average current
mode control
• Power-good signal for each channel
• 300kHz switching frequency
- 180° channel to channel phase operation for reduced input
ripple when not in DDR mode
- 0° channel to channel phase operation in DDR mode for
reduced channel interference
- 90° channel to channel phase operation for reduced input
ripple in DDR mode when VIN is at GND.
Applications
Mobile PCs
• PDAs
• Hand-held portable instruments
Pinout
ISL6225
SSOP-28
TOP VIEW
GND 1
28 VCC
LGATE1 2
27 LGATE2
PGND1 3
26 PGND2
PHASE1 4
25 PHASE2
UGATE1 5
24 UGATE2
BOOT1 6
23 BOOT2
ISEN1 7
22 ISEN2
EN1 8
21 EN2
VOUT1 9
20 VOUT2
VSEN1 10
19 VSEN2
OCSET1 11
18 OCSET2
SOFT1 12
17 SOFT2
DDR 13
16 PG2/REF
VIN 14
15 PG1
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.


Intersil Electronic Components Datasheet

6225CA Datasheet

ISL6225CA

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ISL6225
Absolute Maximum Ratings
Bias Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . + 6.5V
Input Voltage, VIN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +27.0V
PHASE, UGATE Voltage. . . . . . . . . . . . . . . . GND-5V (Note1) to 33V
BOOT, ISEN Voltage. . . . . . . . . . . . . . . . . . . . . GND-0.3V to +33.0V
BOOT with respect to PHASE. . . . . . . . . . . . . . . . . . . . . . . . . + 6.5V
All Other Pins. . . . . . . . . . . . . . . . . . . . . . . .GND -0.3V to VCC + 0.3V
ESD Classification. . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . Class 2
Thermal Information
Thermal Resistance (Typical, Note 2)
θJA (oC/W)
SSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .
78
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
(SSOP - Lead Tips Only)
Recommended Operating Conditions
Bias Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5.0V ±5%
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . +5.0V to +24.0V
Ambient Temperature Range. . . . . . . . . . . . . . . . . . . -10oC to 85oC
Junction Temperature Range . . . . . . . . . . . . . . . . . -10oC to 125oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. 200ns transient.
2. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted.
PARAMETER
SYMBOL
TEST CONDITIONS
VCC SUPPLY
Bias Current
ICC LGATEx, UGATEx Open, VSENx forced above
regulation point, DDR=0, VIN>5V
Shut-down Current
VCC UVLO
Rising VCC Threshold
Falling VCC Threshold
VIN
Input Voltage Pin Current (Sink)
Input Voltage Pin Current (Source)
Shut-down Current
OSCILLATOR
ICCSN
VCCU
VCCD
IVIN
IVINO
IVINS
PWM1 Oscillator Frequency
Ramp Amplitude, pk-pk
Ramp Amplitude, pk-pk
Ramp Offset
Ramp/VIN Gain
Ramp/VIN Gain
REFERENCE AND SOFT START
FC
VR1
VR2
VROFF
GRB1
GRB2
VIN = 16V, by design
VIN = 5V, by design
By design
VIN 3V, by design
1 VIN 3V, by design
Internal Reference Voltage
Reference Voltage Accuracy
VREF
Soft-Start Current During Start-up
Soft-Start Complete Threshold
PWM CONVERTERS
ISOFT
VST
By design
Load Regulation
VSEN pin bias current
VOUT pin input impedance
IVSEN
IVOUT
0.0mA < IVOUT1 < 5.0A; 5.0V < VBATT < 24.0V
By design
VOUT = 5V
MIN
-
-
4.3
4.1
10
-
-
255
-
-
-
-
-
-
-1.0
-
-2.0
50
40
TYP MAX
2.2 3.2
- 30
4.65 4.75
4.35 4.45
- 30
-15 -30
-1
300
2
1.25
0.5
125
250
345
-
-
-
-
-
0.9 -
- +1.0
-5 -
1.5
- +2.0
80 120
55 65
UNITS
mA
µA
V
V
µA
µA
µA
kHz
V
V
V
mV/V
mV/V
V
%
µA
V
%
nA
k
2


Part Number 6225CA
Description ISL6225CA
Maker Intersil Corporation
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6225CA Datasheet PDF






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