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Intersil Electronic Components Datasheet

DG201A Datasheet

Quad SPST / CMOS Analog Switches

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Data Sheet
DG201A, DG202
June 1999 File Number 3117.2
Quad SPST, CMOS Analog Switches
The DG201A and DG202 quad SPST analog switches are
designed using Intersil’s 44V CMOS process. These
bidirectional switches are latch-proof and feature break-
before-make switching. Designed to block signals up to
30VP-P in the OFF state, the DG201A and DG202 offer the
advantages of low ON resistance (175), wide input signal
range (±15V) and provide both TTL and CMOS compatibility.
The DG201A and DG202 are specification and pinout
compatible with the industry standard devices.
Ordering Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
DG201AAK
-55 to 125 16 Ld CERDIP
DG201ABK
-25 to 85 16 Ld CERDIP
DG201ACJ
0 to 70 16 Ld PDIP
DG201ACY
0 to 70 16 Ld SOIC
DG202AK
-55 to 125 16 Ld CERDIP
DG202CJ
0 to 70 16 Ld PDIP
PKG.
NO.
F16.3
F16.3
E16.3
M16.3
F16.3
E16.3
Pinout
DG201A, DG202
(CERDIP, PDIP, SOIC)
TOP VIEW
IN1 1
D1 2
S1 3
V- 4
GND 5
S4 6
D4 7
IN4 8
16 IN2
15 D2
14 S2
13
V+ (SUB-
S- TRATE)
12 NC
11 S3
10 D3
9 IN3
Features
• Input Signal Range. . . . . . . . . . . . . . . . . . . . . . . . . . ±15V
• Low rDS(ON) (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . 175
• TTL, CMOS Compatible
• Latch-Up Proof
• True Second Source
• Maximum Supply Ratings. . . . . . . . . . . . . . . . . . . . . . 44V
• Logic Inputs Accept Negative Voltages
Functional Block Diagrams
DG201A
S1
IN1
D1
S2
IN2
D2
S3
IN3
D3
S4
IN4
D4
DG202
IN1
IN2
IN3
IN4
S1
D1
S2
D2
S3
D3
S4
D4
SWITCHES SHOWN FOR LOGIC “1” INPUT
TRUTH TABLE
LOGIC
DG201A
DG202
0 ON
1 OFF
Logic “0” 0.8V, Logic “1” 2.4V
OFF
ON
4-1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999


Intersil Electronic Components Datasheet

DG201A Datasheet

Quad SPST / CMOS Analog Switches

No Preview Available !

DG201A, DG202
Absolute Maximum Ratings
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44V
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25V
VIN to Ground (Note 1) . . . . . . . . . . . . . . . . . . . (V-) -2V to (V+) +2V
VS or VD to V+ (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . +2 to (V-) -2V
VS or VD to V- (Note 1) . . . . . . . . . . . . . . . . . . . . . . . -2 to (V+) +2V
Current, any Terminal Except S or D . . . . . . . . . . . . . . . . . . . . 30mA
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Peak Current, S or D (Pulsed 1ms, 10% Duty Cycle Max) . . . . . 70mA
Operating Conditions
Temperature Range
“A” Suffix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
“B” Suffix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25oC to 85oC
“C” Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
Thermal Information
Thermal Resistance (Typical, Note 2)
θJA (oC/W) θJC (oC/W)
CERDIP Package. . . . . . . . . . . . . . . . .
75
20
PDIP Package . . . . . . . . . . . . . . . . . . . 100
N/A
SOIC Package . . . . . . . . . . . . . . . . . . . 100
N/A
Maximum Junction Temperature
Ceramic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175oC
Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Signals on VS, VD, or VIN exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications V+ = 15V, V- = -15V, GND = 0V, TA = 25oC
“A” SUFFIX
“B” AND “C” SUFFIX
PARAMETER
TEST CONDITIONS
(NOTE 3)
(NOTE 3)
MIN TYP MAX MIN TYP MAX UNITS
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
Turn-OFF Time, tOFF
Charge Injection, Q
OFF Isolation, OIRR
Crosstalk (Channel to Channel), CCRR
See Figure 1
See Figure 1
CL = 1nF, RS = 0, VS = 0V
VIN = 5V, RL = 75, VS = 2.0V,
f = 100kHz
- 480 600 - 480 - ns
- 370 450 - 370 - ns
- 20 - - 20 - pC
- 70 - - 70 - dB
- -90 - - -90 - dB
Source OFF Capacitance, CS(OFF)
f = 140kHz, VIN = 5V, VS = VD = 0V - 5.0 - - 5.0 - pF
Drain OFF Capacitance, CD(OFF)
- 5.0 - - 5.0 - pF
Channel ON Capacitance,
CD(ON) + CS(ON)
- 16 - - 16 - pF
DIGITAL INPUT CHARACTERISTICS
Input Current with Voltage High, IIH
VIN = 2.4V
VIN = 15V
Input Current with Voltage Low, IIL
VIN = 0V
ANALOG SWITCH CHARACTERISTICS
-1.0 -0.0004 - -1.0 -0.0004 -
- 0.003 1.0 - 0.003 1.0
-1.0 -0.0004 - -1.0 -0.0004 -
µA
µA
µA
Analog Signal Range, VANALOG
-15 - 15 -15 - 15 V
Drain-Source ON Resistance, rDS(ON)
VD = ±10V, VIN = 0.8V (DG201A)
-
115 175 -
115 200
IS = 1mA, VIN = 2.4V (DG202)
Source OFF Leakage Current, IS(OFF)
VIN = 2.4V VS = 14V, VD = -14V
-
0.01 1.0 -
0.01 5.0 nA
(DG201A)
VIN = 0.8V VS = -14V, VD = 14V -1.0
-0.02
- -5.0 -0.02
-
nA
Drain OFF Leakage Current, ID(OFF)
(DG202) VS = -14V, VD = 14V
-
0.01 1.0 -
0.01 5.0 nA
VS = 14V, VD = -14V -1.0 -0.02 - -5.0 -0.02 - nA
4-2


Part Number DG201A
Description Quad SPST / CMOS Analog Switches
Maker Intersil Corporation
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DG201A Datasheet PDF






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