* ON-Resistance (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100Ω
* Low Power Consumption (PD) . . . . . . . . . . . . . . . . . . <1.2mW
* .

The improvements in the DG406 series are made possible by using a high voltage silicon-gate process. An epitaxial layer.

DG406 (PDIP, SOIC) 1 2, 3, 13 4, 5, 6, 7, 8, 9, 10, 11 12 14, 15, 16, 17 18 DG407 (PDIP, SOIC) 1 3, 13, 14, 12 15, 16, 17 18 19, 20, 21, 22, 23, 24, 25, 26 27 27 28 - - 2, 28 - 4, 5, 6, 7, 8, 9, 10, 11 - 19, 20, 21, 22, 23, 24, 25, 26 SYMBOL V+.

DG4000

DG401

DG401B

DG402

DG402B

DG403

DG405

DG4051A

DG4051E

DG4052A

DG4052E

DG4053A

DG4053E