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Intersil Electronic Components Datasheet

DG528 Datasheet

Analog CMOS Latchable Multiplexers

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April 1999
Semiconductor
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DG526, DG527,
DG528, DG529
Analog CMOS
Latchable Multiplexers
Features
Description
• Direct RESET
• TTL and CMOS Compatible Address and Enable
Inputs
• Maximum Power Supply Rating . . . . . . . . . . . . . . . . 44V
• Break-Before-Make Switching
• Alternate Source
Applications
• Data Acquisition Systems
• Communication Systems
• Automatic Test Equipment
• Microprocessor Controlled Systemd
The DG526, DG527, DG528, and DG529 are CMOS
Monolithic 16-Channel/Dual 4-Channel Analog Multiplexers.
Each device has on-chip address and control latches to sim-
plify design in microprocessor based applications. The DG526
uses 4 address lines to control its 16 channels; the DG527,
DG528 both use 3 address lines to control their 8 channels;
and the DG529 uses 2 address lines to control its 4 channels.
The enable pin is used to enable the address latches during
the WR pulse. It can be hard wired to the logic supply if one of
the channels will always be used (except during a reset) or it
can be tied to address decoding circuitry for memory mapped
operation. The RS pin is used to clear all latches regardless of
the state of any other latch or control line. The WR pin is used
to transfer the state of the address control lines to their
latches, except during a reset or when EN is low.
A channel in the ON state conducts signals equally well in
both directions. In the OFF state each channel blocks volt-
ages up to the supply rails. The address inputs, WR, RS and
the enable input are TTL and CMOS compatible over the full
specified operation temperature range.
Part Number Information
PART
NUMBER
DG526AK
DG526AK/883B
DG526BK
DG526BY
DG526CJ
DG526CK
DG526CY
DG527AK
DG527AK/883B
DG527BK
DG527BY
DG527CJ
DG527CK
DG527CY
TEMP.
RANGE (oC)
PACKAGE
-55 to 125 28 Ld CERDIP
-55 to 125 28 Ld CERDIP
-25 to 85 28 Ld CERDIP
-25 to 85 28 Ld SOIC
0 to 70 28 Ld PDIP
0 to 70 28 Ld CERDIP
0 to 70 28 Ld SOIC
-55 to 125 28 Ld CERDIP
-55 to 125 28 Ld CERDIP
-25 to 85 28 Ld CERDIP
-25 to 85 28 Ld SOIC
0 to 70 28 Ld PDIP
0 to 70 28 Ld CERDIP
0 to 70 28 Ld SOIC
PKG. NO.
F28.6
F28.6
F28.6
M28.3
E28.6
F28.6
M28.3
F28.6
F28.6
F28.6
M28.3
E28.6
F28.6
M28.3
PART
NUMBER
DG528AK
DG528AK/883B
DG528BK
DG528BY
DG528CJ
DG528CK
DG528CY
DG529AK
DG529AK/883B
DG529BK
DG529BY
DG529CJ
DG529CK
DG529CY
TEMP.
RANGE (oC)
PACKAGE
-55 to 125 18 Ld CERDIP
-55 to 125 18 Ld CERDIP
-25 to 85 18 Ld CERDIP
-25 to 85 18 Ld SOIC
0 to 70 18 Ld PDIP
0 to 70 18 Ld CERDIP
0 to 70 18 Ld SOIC
-55 to 125 18 Ld CERDIP
-55 to 125 18 Ld CERDIP
-25 to 85 18 Ld CERDIP
-25 to 85 18 Ld SOIC
0 to 70 18 Ld PDIP
0 to 70 18 Ld CERDIP
0 to 70 18 Ld SOIC
PKG. NO.
F18.3
F18.3
F18.3
M18.3
E18.3
F18.3
M18.3
F18.3
F18.3
F18.3
M18.3
E18.3
F18.3
M18.3
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © Harris Corporation 1999
12-1
File Number 3139.2


Intersil Electronic Components Datasheet

DG528 Datasheet

Analog CMOS Latchable Multiplexers

No Preview Available !

DG526, DG527, DG528, DG529
Pinouts
DG526
(PDIP, CERDIP, SOIC)
TOP VIEW
V+ 1
NC 2
RS 3
S16 4
S15 5
S14 6
S13 7
S12 8
S11 9
S10 10
S9 11
GND 12
WR 13
A3 14
28 D
27 V-
26 S8
25 S7
24 S6
23 S5
22 S4
21 S3
20 S2
19 S1
18 EN
17 A0
16 A1
15 A2
DG527
(PDIP, CERDIP, SOIC)
TOP VIEW
V+ 1
DB 2
RS 3
S8B 4
S7B 5
S6B 6
S5B 7
S4B 8
S3B 9
S2B 10
S1B 11
GND 12
WR 13
NC 14
28 DB
27 V-
26 S8A
25 S7A
24 S6A
23 S5A
22 S4A
21 S3A
20 S2A
19 S1A
18 EN
17 A0
16 A1
15 A2
DG528
(PDIP, CERDIP, SOIC)
TOP VIEW
WR 1
A0 2
EN 3
V- 4
S1 5
S2 6
S3 7
S4 8
D9
18 RS
17 A1
16 A2
15 GND
14 V+
13 S5
12 S6
11 S7
10 S8
DG529
(PDIP, CERDIP, SOIC)
TOP VIEW
WR 1
A0 2
EN 3
V- 4
S1A 5
S2A 6
S3A 7
S4A 8
DA 9
18 RS
17 A1
16 GND
15 V+
14 S1B
13 S2B
12 S3B
11 S4B
10 DB
12-2


Part Number DG528
Description Analog CMOS Latchable Multiplexers
Maker Intersil Corporation
PDF Download

DG528 Datasheet PDF






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