HI3197 Description
2 Use this pin for MUX.1A or MUX.2 mode. Leave open for other modes. 17 VREF DGND1 18 DIV2OUT O TTL DVCC1 1/ Freque.
HI3197 Key Features
- Resolution
- 10 Bits
- Conversion Rate 125 MSPS (PECL) 100 MSPS (TTL)
- Data Input Level
- Low Power Consumption
- 400mW (Typ)
- Low Glitch Energy
- 1.5pV-s
- Clock, Reset Input Level: TTL and PECL patible 2:1 Multiplexed Input Function
- 1/2 Frequency-Divided Clock Output Possible by the BuiltIn Clock Frequency Divider Circuit