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HSP43881 - Digital Filter

Description

SYMBOL VCC PIN NUMBER A3, A10, B1, D11, F10, J1, K4, L7 A1, A11, E2, F1, E11, H11, K3, K6, L9 G3 A58, B67, C67 I I TYPE +5V Power Supply Input.

Power Supply Ground Input.

The CLK input provides the DF system sample clock.

Features

  • Eight Filter Cells.
  • 0MHz to 30MHz Sample Rate.
  • 8-Bit Coefficients and Signal Data.
  • 26-Bit Accumulator Per Stage.
  • Filter Lengths Over 1000 Taps.
  • Expandable Coefficient Size, Data Size and Filter Length.
  • Decimation by 2, 3 or 4.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
HSP43881 Data Sheet May 1999 File Number 2758.4 Digital Filter The HSP43881 is a video speed Digital Filter (DF) designed to efficiently implement vector operations such as FIR digital filters. It is comprised of eight filter cells cascaded internally and a shift and add output stage, all in a single integrated circuit. Each filter cell contains a 8 x 8-bit multiplier, three decimation registers and a 26-bit accumulator. The output stage contains an additional 26-bit accumulator which can add the contents of any filter cell accumulator to the output stage accumulator shifted right by 8 bits. The HSP43881 has a maximum sample rate of 30MHz. The effective multiply accumulate (mac) rate is 240MHz. The HSP43881 DF can be configured to process expanded coefficient and word sizes.
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