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Intersil Electronic Components Datasheet

SBDIP Datasheet

High-Reliability CMOS 8-Bit Microprocessor

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CDP1802AC/3
March 1997
High-Reliability CMOS 8-Bit Microprocessor
[ /Title
(CDP1
802AC
/3)
/Sub-
ject
(High-
Reli-
ability
CMOS
8-Bit
Micro-
proces-
sor)
/Autho
r ()
/Key-
words
(Inter-
sil
Corpo-
ration,
8-bit
micro-
proces-
sors, 8
bit
micro-
proces-
sors,
periph-
erals)
/Cre-
ator ()
/DOCI
NFO
pdf-
mark
Features
Description
• For Use In Aerospace, Military, and Critical Industrial
Equipment
• Minimum Instruction Fetch-Execute Time of 4.5µs
(Maximum
= +25oC
Clock
Frequency
of
3.6MHz)
at
VDD
=
5V,
TA
• Operation Over the Full Military
Temperature Range . . . . . . . . . . . . . . . -55oC to +125oC
• Any Combination of Standard RAM and ROM Up to
65,536 Bytes
• 8–Bit Parallel Organization With Bidirectional Data
Bus and Multiplexed Address Bus
• 16 x 16 Matrix of Registers for Use as Multiple Pro-
gram Counters, Data Pointers, or Data Registers
• On-Chip DMA, Interrupt, and Flag Inputs
• High Noise Immunity . . . . . . . . . . . . . . . . . . 30% of VDD
Ordering Information
PACKAGE
TEMP. RANGE
(oC)
5V - 3.2MHz
PKG
NO.
SBDIP
-55 to 125
CDP1802ACD3 D40.6
The CDP1802A/3 High-Reliability LSI CMOS 8-bit register
oriented Central-Processing Unit (CPU) is designed for use
as a general purpose computing or control element in a wide
range of stored-program systems or products.
The CDP1802A/3 includes all of the circuits required for
fetching, interpreting, and executing instructions which have
been stored in standard types of memories. Extensive
input/output (I/O) control features are also provided to facili-
tate system design.
The 1800 Series Architecture is designed with emphasis on
the total microcomputer system as an integral entity so that
systems having maximum flexibility and minimum cost can be
realized. The 1800 Series CPU also provides a synchronous
interface to memories and external controllers for I/O devices,
and minimizes the cost of interface controllers. Further, the I/O
interface is capable of supporting devices operating in polled,
interrupt-driven, or direct memory-access modes.
The CDP1802AC/3 is functionally identical to its predeces-
sor, the CDP1802. The “A” version includes some perfor-
mance enhancements and can be used as a direct
replacement in systems using the CDP1802.
This type is supplied in 40 lead dual-in-line sidebrazed
ceramic packages (D suffix).
Pinout
CDP1802AC/3 (SBDIP)
TOP VIEW
CLOCK 1
WAIT 2
CLEAR 3
Q4
SC1 5
SC0 6
MRD 7
BUS 7 8
BUS 6 9
BUS 5 10
BUS 4 11
BUS 3 12
BUS 2 13
BUS 1 14
BUS 0 15
VCC 16
N2 17
N1 18
N0 19
VSS 20
40 VDD
39 XTAL
38 DMA IN
37 DMA OUT
36 INTERRUPT
35 MWR
34 TPA
33 TPB
32 MA7
31 MA6
30 MA5
29 MA4
28 MA3
27 MA2
26 MA1
25 MA0
24 EF1
23 EF2
22 EF3
21 EF4
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
3-30
File Number 1441.2


Intersil Electronic Components Datasheet

SBDIP Datasheet

High-Reliability CMOS 8-Bit Microprocessor

No Preview Available !

CDP1802AC/3
CDP1852
INPUT PORT CS2
CS1
DATA CS1
CDP1852 CS2
OUTPUT CLOCK
PORT
ADDRESS BUS
N0 MA0–7
MRD
CDP1802
8–BIT CPU
MWR
N1
TPB DATA TPA
MA0–7
MRD
CDP1833
1K–ROM
CEO
TPA DATA
8–BIT DATA BUS
MA0–4
MRD
CDP1824
32 BYTE RAM
MWR
CS
DATA
FIGURE 1. TYPICAL CDP1802A/3 SMALL MICROPROCESSOR SYSTEM
3-31


Part Number SBDIP
Description High-Reliability CMOS 8-Bit Microprocessor
Maker Intersil Corporation
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